2N5434 Datasheet, PDF (1/2 Pages) Calogic, LLC – N-Channel JFET Switch

N-Channel JFET Switch
2N5434
FEATURES
Low rds(on)
• _{Excellent Switching}
•• _{Low Cutoff Current}
PIN CONFIGURATION
(TO-52)
5018
G, C
D
S
CORPORATION
ABSOLUTE MAXIMUM RATINGS
(TA = 25^oC unless otherwise noted)
Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V
Gate-Drain Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA
Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400mA
Storage Temperature Range . . . . . . . . . . . . . -65^oC to +200^oC
Operating Temperature Range . . . . . . . . . . . -55^oC to +150^oC
Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300^oC
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mW
Derate above 25^oC . . . . . . . . . . . . . . . . . . . . . . . 2.3mW/^oC
NOTE: Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
ORDERING INFORMATION
Part
2N5434
X2N5434
Package
Temperature Range
Hermetic TO-52
-55^oC to +150^oC
Sorted Chips in Carriers -55^oC to +150^oC
ELECTRICAL CHARACTERISTICS (TA = 25^oC unless otherwise specified)
SYMBOL
PARAMETER
IGSS
BVGSS
ID(off)
VGS(off)
IDSS
rDS(on)
VDS(on)
rds(on)
Ciss
Crss
td
tr
toff
tf
Gate Reverse Current
Gate-Source Breakdown Voltage
Drain Cutoff Current
Gate-Source Cutoff Voltage
Saturation Drain Current (Note 1)
Static Drain-Source ON Resistance
Drain-Source ON Voltage
Drain-Source ON Resistance
Common-Source Input Capacitance (Note2)
Common-Source Reverse Transfer Capacitance (Note 2)
Turn-ON Delay Time (Note 2)
Rise Time (Note 2)
Turn-OFF Delay Time (Note 2)
Fall Time (Note 2)
2N5434
MIN
MAX
-200
-200
-25
200
200
-1
-4
30
10
100
10
30
15
4
1
6
30
NOTES: 1. Pulse test required, pulsewidth 300µs, duty cycle ≤3%.
2. For design reference only, not 100% tested.
UNITS
TEST CONDITIONS
pA
nA
V
pA
nA
V
mA
ohm
mV
ohm
pF
VGS = -15V, VDS = 0
TA = 150^oC
IG = -1µA, VDS = 0
VDS = 5V, VGS = -10V
TA = 150^oC
VDS = 5V, ID = 3nA
VDS = 15V, VGS = 0
VGS = 0, ID = 10mA
VGS = 0, ID = 0 f = 1kHz
VDS = 0,
VGS = -10 V
f = 1MHz
VDD = 1.5V,
ns VGS(on) = 0,
VGS(off) = -12V,
ID(on) = 10mA