CMC7101A Datasheet, PDF (9/10 Pages) California Micro Devices Corp – CMC7101A Low Power Operational Amplifier, RRIO, SOT23-5

CALIFORNIA MICRO DEVICES
CMC7101A
which the CMC7101A is operated from a +5 volt
supply, the output is “programmed” to positive
saturation, and the output pin is indefinitely shorted to
the opposite rail. In general:
P_diss
= (V+ – Vout) * Iout
(2)
Where: P_diss = Power dissipated by the chip
V+ = Supply voltage
Vout = The output voltage
In this example, V+ – Vout would equal 2.5 V– (-2.5
V) = 5 V, and power dissipation would be equal to
375 mW.
T_J = T_A + θ_JA* P_diss
(3)
Since the parasitic capacitance can change between
the breadboard and the production printed circuit board,
we favor the use of a “gimmick” , a technique perfected
by TV technicians in the 1950’s. A gimmick is made
by taking two lengths (typically about a foot) of small
gauge insulated wire such as AWG 24, twisting them
together, and then after baring all ends soldering the
gimmick across R_f. With the circuit operating, C_f is
“adjusted” by clipping short lengths of the gimmick
off until the compensation is nominal. Then simply
remove the gimmick, take it to an impedance bridge,
and select the capacitor accordingly.
Where: T_A = The ambient temperature
θ_JA = The thermal impedance of the package
junction to ambient
The SOT23 exhibits a θ_JA equal to 325 °C/W. Thus for
our example the junction temperature rise would be
about 122°C which is nearly a destructive situation
since the maximum junction temperature rating is 150
°C. Under normal operating conditions with a resistive
load, equations (2) and (3) may be used to determine
T_{J .} For example, for Vout = 1.35 volts, V+ = 2.7
volts, V- = ground, and a load of 20 mA, P_diss = 27
mW with a corresponding junction temperature rise
of a mere 9 °C. If the ambient temperature is 85 °C
maximum, the junction temperature is a safe 94 °C.
2.2 Input Impedance Considerations
The CMC7101A exhibits an input impedance typically
in excess of 1 Tera Ω (1 X 10 ¹² ohms) making it very
appropriate for applications involving high source
impedance such as photodiodes and high output
impedance transducers or long time constant
integrators. High source impedances usually dictate
large feedback resistors. But, the output capacitance
of the source in parallel with the input capacitance of
the CMC7101A (which is typically 3 pF) creates a
parasitic pole with the feedback resistor which erodes
the phase margin of the amplifier. The usual fix is to
bypass, R_f, as shown in Figure 2 with a small capacitor
to cancel the input pole. The usual formula for
calculating C_f always results in a value larger than
required:
1
1
——————— > ————————— (4)
2 π R_S C_S
2 π R_f C_f
Figure 2 C_F High Frequency Compensation
2.3 Capacitive Load Considerations
The CMC7101A is capable of driving capacitive loads
in excess of 100 pF without oscillation. However,
significant peaking will result. Probably the easiest way
to minimize this problem is to use an isolation resistor
as shown in Figure 3.
Figure 3 Riso Capacitive Load Isolation
2.4 Power Supply Decoupling
The CMC7101A is not prone to oscillation without the
use of power supply decoupling capacitors, however to
minimize hum and noise pick-up, it is recommended
that the rails be bypassed with 0.01 micro farad capacitors.
© 2000 California Micro Devices Corp. All rights reserved.
2/00
215 Topaz Street, Milpitas, California 95035 Tel: [phone] Fax: [phone] www.calmicro.com
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