PACNLT101 Datasheet, PDF (3/5 Pages) California Micro Devices Corp – NON-LINEAR HIGH SPEED TERMINATION IC

PACNLT101
50
45
40
35
30
25
20
15
10
5
VDD = 3.3V
VDD = 2.0V
0
0
100
200
300
400
500
600
Voltage above V_DD (mV)
Figure 1. DC I-V Curves for V_DD = 2V and V_DD = 3.3V
Application Information
Figure 2 shows one method of configuring the printed
circuit board such that all 16 terminated signals are
easily accessible. The decoupling capacitor should be a
high-frequency type, 0.1µF or larger, and placed as close
to the IC as possible. This will minimize
the positive overshoot voltage and also reduce
EMI emissions. It should be noted that for optimum
performance the PACNLT101 termination should be
located as physically close to the receiving IC input as is
possible.
16
Terminated
Signals
GND
GND
1
24
2
23
3
22
4
21
5
20
6
19
PACNLT101
7
18
8
17
9
16
10
15
11
14
12
13
V_DD
0.1µF
GND
GND
via
Figure 2. Printed Circuit Board with Accessible Configuration for 16 Terminated Signals
©2001 California Micro Devices Corp. All rights reserved. EZterm™ is a trademark of California Micro Devices
215 Topaz Street, Milpitas, California 95035  Tel: [phone]
Fax: [phone]
www.calmicro.com
3/8/2001
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