PACRG Datasheet, PDF (2/3 Pages) California Micro Devices Corp – P/ACTIVE HIGH PERFORMANCE GTL/ECL LOCAL TERMINATION NETWORK

CALIFORNIA MICRO DEVICES
PACRG
Signal at Termination and Victim Line (TA=25^OC) (See Test Circuit)
Channel 1 (500mV/division) Termination Signal, Channel 2 (250mV/division) Victim Voltage. The victim voltage
crosstalk measures 65mV in the critical areas around the system clock. The system clock occurs approximately 4ns
before each data transition. The horizontal dashed lines are 65mV apart. The time scale is 5.0ns/division. The signal
voltage rise and fall times have been adjusted at the driver to conform to Intel specifications.) Measurements made
using Tektronix TDS820 6 GHz Digitizing Oscilloscope with P6207 FET Probes.
Cha
500mV/De
Cha
250mV/De
Test Circuit Block Diagram
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