PACDN2404C Datasheet, PDF (2/3 Pages) California Micro Devices Corp – ESD PROTECTION ARRAYS, CHIP SCALE PACKAGE

CALIFORNIA MICRO DEVICES
PACDN2404C
PACDN2408C
PACDN2416C
S P E C I F I C AT I O N S
(At 25°C unless specified otherwise)
Reverse Stand-off Voltage, I = 10µA
Min
Typ
Max
Unit
±5.9
V
Signal Clamp Voltage:
Positive Clamp, 10mA
Negative Clamp, 10mA
6.0
7.6
9.2
V
–9.2
–7.6
–6.0
V
In-system ESD withstand voltage*:
Human Body Model (MIL-STD-883D, method 3015)
IEC 61000-4-2, contact discharge method
±30
kV
±18
kV
Clamping voltage during ESD discharge
MIL-STD-883D (Method 3015), 8kV
Positive
Negative
14
V
–14
V
Capacitance at 2.5V dc, 1MHz
39
pF
Temperature Range:
Operating
Storage
–40
85
°C
–65
150
* ESD applied between channel pin and ground, one at a time. All other channels are open. This
parameter is guaranteed by design and characterization
PRINTED CIRCUIT BOARD RECOMMENDATIONS
Pad Size on PCB
0.300mm
Pad Shape
Round
Pad Definition
Non Solder Mask Defined Pads (NSMD)
Solder Mask Opening
0.350mm
Solder Stencil Thickness
0.152mm
Solder Stencil Aperture Opening
0.360mm (sq.)
Solder Flux Ratio
50/50
Solder Paste
No Clean
Bond Trace Finish
OSP (Entek Cu Plus 106A)
250
EXH PH
Z2
Z3
Z4
Z5
RF
CD
EXH
225
200
175
150
125
100
75
50
25
0
48
97
145
194
242
290
339
387
435
Time (s)
Typical Solder Reflow Thermal Profile (No Clean Flux)
©2000 California Micro Devices Corp. All rights reserved.
2
215 Topaz Street, Milpitas, California 95035
Tel: [phone]
Fax: [phone]
www.calmicro.com 7/17/2000