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CM3196 Datasheet, PDF (2/13 Pages) California Micro Devices Corp – 2A Sink/Source DDR-I, -II Bus Termination Regulator
CM3196
PACKAGE / PINOUT DIAGRAM
TOP VIEW
TOP VIEW
GND
SD
VSENSE
VREF
1
8
2
7
3
6
4
5
VTT
PVIN
AVIN
VDDQ
8-lead SOIC
Note: This drawing is not to scale.
GND
SD
VSENSE
VREF
1
8
2
7
GND
3
6
4
5
VTT
PVIN
AVIN
VDDQ
8-lead PSOP
LEAD(S)
1
2
3
4
5
6
7
8
NAME
GND
SD
VSENSE
VREF
VDDQ
AVIN
PVIN
VTT
PIN DESCRIPTIONS
DESCRIPTION
Ground
Shutdown input, active low
Feedback from VTT input
Reference output, VDDQ/2
VDDQ input
Analog circuit power input
Power transistor input
Output
Ordering Information
PART NUMBERING INFORMATION
Standard Finish
Pins
Package
Ordering Part
Number1
Part Marking
8
SOIC-8
CM3196-12SN
CM3196-12SN
8
PSOP-8
CM3196-12SB
CM3196-12SB
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
Lead-free Finish
Ordering Part
Number1
Part Marking
CM3196-12SM
CM3196-12SM
CM3196-12SH
CM3196-12SH
© 2004 California Micro Devices Corp. All rights reserved.
2 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214
▲ Fax: 408.263.7846 ▲ www.calmicro.com
04/22/04