PACDN005 Datasheet, PDF (1/2 Pages) California Micro Devices Corp – P/ACTIVE SCHOTTKY DIODE HIGH SPEED BUS TERMINATOR

CALIFORNIA MICRO DEVICES
PACDN005
P/ACTIVE SCHOTTKY DIODE HIGH SPEED BUS TERMINATOR
Features
• 36 integrated diodes in a single package
offers 18 channel, dual rail clamping action
• Provides proper bus termination independent of
external line or card loading conditions
• Schottky diode technology; excellent forward
voltage and reverse recovery characteristics
• 24-pin QSOP package saves board space and
eases layout in space critical bus termination
applications versus discrete approaches
Applications
• PCI v2.1 Bus Termination for Intel-based Pentium®
and Pentium Pro systems
• Local high speed bus termination for all popular
RISC and embedded microprocessor applications
• High speed memory and SDRAM Memory
Bus Termination
Refer to AP-201 Termination Application Note for
further information.
Product Description
Note: CMD’s P/Active DN005 Schottky Diode High Speed Bus Terminator is an upgraded version of the original PDN001 or
IPEC DN001 Diode Array. PACDN005 provides minimized lead inductance and parasitic capacitive effects (with added ground
pins), improved forward voltage and crosstalk attributes, and excellent termination performance characteristics at high data
transmission rates. The PACDN005 is recommended for all new designs.
Reflections on high speed data lines lead to undershoot and overshoot disturbances which may result in improper system
operation. Resistor terminations, when used to terminate high speed data lines, increase power consumption and degrade
output (high) levels resulting in reduced noise immunity. Schottky diode termination is the best overall solution for applica-
tions in which power consumption and noise immunity are critical considerations.
CMD’s P/Active DN005 Schottky Diode High Speed Bus Terminator^† is specifically designed to minimize undershoot/over-
shoot disturbances caused by reflection noise on high speed bus lines such as v2.1 66MHz PCI buses, all varieties of RISC
embedded processor/control local buses, synchronous DRAM, and other high speed memory bus termination applications.
This highly integrated Schottky diode network provides very effective termination performance for high speed data lines under
variable loading conditions. The device supports up to 18 terminated lines per package — each of which can be simulta-
neously clamped to both ground and power supply rail. A typical bus termination application will utilize three PAC DN005
devices to replace approximately 50 conventional Schottky diode pairs; thus providing significant reductions in component
and assembly costs, improvements in manufacturing efficiency and reliability, and savings in allocated board area for space-
critical designs.
SCHEMATIC CONFIGURATION
VDD
VDD
GND
24 23 22 21 20 19 18 17 16 15 14 13
1 2 3 4 5 6 7 8 9 10 11 12
GND
GND
VDD
©2000 California Micro Devices Corp. All rights reserved.
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215 Topaz Street, Milpitas, California 95035 Tel: [phone] Fax: [phone] www.calmicro.com
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