SPT774 Datasheet, PDF (3/12 Pages) List of Unclassifed Manufacturers – FAST, COMPLETE 12-BIT UP COMPATIBLE A/D CONVERTER WITH SAMPLE/HOLD

ELECTRICAL SPECIFICATIONS
T_A = T_MIN to T_MAX, V_EE = 0 to +5 V, V_DD = +5 V, f_S = 117 kHz, f_IN = 10 kHz, unless otherwise specified.
PARAMETER
TEST
CONDITIONS
DC ELECTRICAL CHARACTERISTICS
TEST
LEVEL
SPT774C
MIN TYP MAX
SPT774B
MIN TYP MAX UNITS
Power Supplies Operating
Voltage Range
V_DD
V_EE2
Operating Current
I_DD
I_EE2
Power Dissipation
Internal Reference
Voltage
Output Current³
V_EE = +5 V
IV
+4.5
IV
+5.5
V_DD
+4.5
+5.5 Volts
V_DD Volts
IV
15
24
15
24 mA
IV
167
167
µA
VI
75 120
75 120 mW
VI
2.4
2.5
2.6
2.4
2.5
2.6 Volts
VI
0.5
0.5
mA
DIGITAL CHARACTERISTICS
Logic Inputs
(CE, CS , R/C , Ao, 12/8 )
Logic 0
Logic1
VI
-0.5
VI
2.0
+0.8 -0.5
5.5
2.0
+0.8 Volts
5.5 Volts
Current
VI
-5.0 0. 1
5.0 -5.0 0. 1
5.0 µA
Capacitance
Logic Outputs
(DB11-DB0, STS)
Logic 0
Logic 1
Leakage
Capacitance
V
(I_Sink = 1.6 mA)
VI
(I_SOURCE = 500 µA)
VI
(High Z State,
VI
DB11-DB0 Only)
V
5
5
pF
+2.4
-5
+0.4
+2.4
0.1
+5
-5
5
+0.4 Volts
Volts
0.1
+5 µA
5
pF
AC Accuracy
f_S=117 kHz, f_IN=10 kHz
Spurious Free Dyn. Range
V
73
78
76
78
dB
Total Harmonic Distortion
V
-77
-72
-77
-75 dB
Signal-to-Noise Ratio
V
69
72
71
72
dB
Signal-to-Noise & Distortion
V
68
71
70
71
dB
(SINAD)
Intermodulation Distortion f_IN=20 kHz;
V
-75
f_IN2=23 kHz
Note 1: Fixed 50 Ω resistor from REF OUT to REF IN and REF OUT to BIP OFF.
-75
dB
Note 2: V_EE is optional and is only used to set the mode for the internal sample/hold. When not using V_EE, the pin should be treated
as a no connect. If V_EE is connected to 0 to -15 V, aperture delay (t_AP) will increase from 20 ns (typ) to 4000 ns (typ).
Note 3: Available for external loads; external load should not change during conversion.
SPT774
3
8/1/00