SPT9101 Datasheet, PDF (1/8 Pages) Fairchild Semiconductor – 125 MSPS SAMPLE-AND-HOLD AMPLIFIER

SPT9101
125 MSPS SAMPLE-AND-HOLD AMPLIFIER
FEATURES
• Second Source of AD9101
• 350 MHz Sampling Bandwidth
• 125 MHz Sampling Rate
• Excellent Hold Mode Distortion
-75 dB at 50 MSPS (23 MHz V_IN)
-62 dB at 100 MSPS (48 MHz V_IN)
• 7 ns Acquisition Time to 0.1%
• <1 ps Aperture Jitter
• 66 dB Feedthrough Rejection at 50 MHz
• Low Spectral Noise Density
APPLICATIONS
• Test Instrumentation Equipment
• RF Demodulation Systems
• High Performance CCD Capture
• Digital Sampling Oscilloscopes
• Commercial and Military Radar
• High-Speed DAC Deglitching
GENERAL DESCRIPTION
The SPT9101 is a high-speed track-and-hold amplifier de-
signed for a wide range of use. The SPT9101 is capable of
sampling at speeds up to 125 MSPS with resolutions ranging
from 8 to 12 bits. Trim programmable internal hold and
compensation capacitors provide for optimized input band-
width and slew rate versus noise performance.
The performance of this device makes it an excellent front
end driver for a wide range of ADCs on the market today.
Significant improvements in dynamic performance can be
achieved by using this device ahead of virtually all ADCs that
do not have an internal track-and-hold.
The SPT9101 is offered in 20-lead SOIC and LCC packages
over the industrial temperature range and in die form. Contact
the factory for military and /833 package options.
BLOCK DIAGRAM
-
Sampler
VIn
+
CH_OLD
+ _4X
Amp
-
R
3R
VO_UT
CLK NCLK
RTN