SPT5400 Datasheet, PDF (1/8 Pages) Fairchild Semiconductor – 13-BIT, OCTAL VOLTAGE-OUTPUT DAC WITH PARALLEL INTERFACE

SPT5400
13-BIT, OCTAL VOLTAGE-OUTPUT DAC
WITH PARALLEL INTERFACE
FEATURES
• Full 13-bit performance without external adjustments
• Eight DACs in one package
• Buffered voltage outputs
• Guaranteed monotonic to 13 bits
• Unipolar or bipolar output swing to ±4.5 V
• Output settling time of 7 µs to ±1/2 LSB
• Double-buffered digital inputs
APPLICATIONS
• Automatic test equipment
• Flat-panel displays
• Arbitrary function generators
• Instrumentation
• Process control
DESCRIPTION
The SPT5400 has eight 13-bit voltage output digital-to-
analog converters on one chip. It operates from ±5 V
power supplies and has maximum voltage output swings
of up to ±4.5 V without the addition of external compo-
nents. Novel circuit topology allows for a guaranteed
monotonicity of 13 bits without the need for additional
circuitry. The SPT5400 has four separate reference volt-
age inputs, one for each pair of DACs. Four separate
analog ground pins allow for separate offset voltages for
each DAC pair. Each DAC can be asynchronously loaded
through a common 13-bit bus into a double-buffered set
of latches. All logic inputs are TTL/CMOS compatible.
The SPT5400 is available in a 44-lead PLCC package
over the commercial temperature range of 0 °C to
+70 °C.
BLOCK DIAGRAM
V_DD
REFAB REFCD REFEF REFGH
INPUT
LATCH A
DAC
LATCH A
DAC A
INPUT
LATCH B
DAC
LATCH B
DAC B
INPUT
LATCH C
DAC
LATCH C
DAC C
D12–D0 DATA BUS
INPUT
LATCH D
INPUT
LATCH E
DAC
LATCH D
DAC
LATCH E
DAC D
DAC E
INPUT
LATCH F
DAC
LATCH F
DAC F
INPUT
LATCH G
DAC
LATCH G
DAC G
INPUT
LATCH H
DAC
LATCH H
DAC H
CS
CONTROL
WR
LOGIC
A0–A2
LDAB
LDCD
LDEF
LDGH
CLR
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
V_{SS GND}
V_OUTA
AGNDAB
V_OUTB
V_OUTC
AGNDCD
V_OUTD
V_OUTE
AGNDEF
V_OUTF
V_OUTG
AGNDGH
V_OUTH