BUF20800 Datasheet, PDF (9/27 Pages) Burr-Brown (TI) – 18-Channel GAMMA VOLTAGE GENERATOR with Two Programmable VCOM Channels

BUF20800
www.ti.com
Writing:
To write to a single DAC register:
1. Send a START condition on the bus.
2. Send the device address and read/write bit = LOW.
The BUF20800 will acknowledge this byte.
3. Send a DAC address byte. Bits D7−D5 must be set to
0. Bits D4−D0 are the DAC address. Only DAC
addresses 00000 to 10011 are valid and will be
acknowledged. Table 3 shows the DAC addresses.
4. Send two bytes of data for the specified DAC register.
Begin by sending the most significant byte first (bits
D15−D8, of which only bits D9 and D8 are used, and
bits D15−D14 must not be 01), followed by the least
significant byte (bits D7−D0). The register is updated
after receiving the second byte.
5. Send a STOP condition on the bus.
Table 3. DAC Addresses
DAC
DAC_1
DAC_2
DAC_3
DAC_4
DAC_5
DAC_6
DAC_7
DAC_8
DAC_9
DAC_10
DAC_11
DAC_12
DAC_13
DAC_14
DAC_15
DAC_16
DAC_17
DAC_18
V_{COM OUT1}
V_{COM OUT2}
ADDRESS
0000 0000
0000 0001
0000 0010
0000 0011
0000 0100
0000 0101
0000 0110
0000 0111
0000 1000
0000 1001
0000 1010
0000 1011
0000 1100
0000 1101
0000 1110
0000 1111
0001 0000
0001 0001
0001 0010
0001 0011
The BUF20800 will acknowledge each data byte. If the
master terminates communication early by sending a
STOP or START condition on the bus, the specified
register will not be updated. Updating the DAC register is
not the same as updating the DAC output voltage. See the
Output Latch section.
The process of updating multiple DAC registers begins the
same as when updating a single register. However,
instead of sending a STOP condition after writing the
addressed register, the master continues to send data for
the next register. The BUF20800 automatically and
sequentially steps through subsequent registers as
additional data is sent. The process continues until all
desired registers have been updated or a STOP condition
is sent.
SBOS329D − JUNE 2005 − REVISED OCTOBER 2006
To write to multiple DAC registers:
1. Send a START condition on the bus.
2. Send the device address and read/write bit = LOW.
The BUF20800 will acknowledge this byte.
3. Send either the DAC_1 address byte to start at the first
DAC, or send the address byte for whichever DAC will
be the first in the sequence of DACs to be updated.
The BUF20800 will begin with this DAC and step
through subsequent DACs in sequential order.
4. Send the bytes of data; begin by sending the most
significant byte (bits D15−D8, of which only bits D9
and D8 have meaning), followed by the least
significant byte (bits D7−D0). The first two bytes are
for the DAC addressed in step 3 above. Its register is
automatically updated after receiving the second byte.
The next two bytes are for the following DAC. That
DAC register is updated after receiving the fourth byte.
This process continues until the registers of all
following DACs have been updated.
5. Send a STOP condition on the bus.
The BUF20800 will acknowledge each byte. To terminate
communication, send a STOP or START condition on the
bus. Only DAC registers that have received both bytes of
data will be updated.
Reading:
Reading a DAC register will return the data stored in the
DAC. This data can differ from the data stored in the DAC
register. See the Output Latch section.
To read the DAC value:
1. Send a START condition on the bus.
2. Send the device address and read/write bit = LOW.
The BUF20800 will acknowledge this byte.
3. Send the DAC address byte. Bits D7−D5 must be set
to 0; Bits D4−D0 are the DAC address. Only DAC
addresses 00000 to 10011 are valid and will be
acknowledged.
4. Send a START or STOP/START condition on the bus.
5. Send correct device address and read/write
bit = HIGH. The BUF20800 will acknowledge this
byte.
6. Receive two bytes of data. They are for the specified
DAC. The first received byte is the most significant
byte (bits D15−D8; only bits D9 and D8 have
meaning); the next byte is the least significant byte
(bits D7−D0).
7. Acknowledge after receiving the first byte.
8. Do not acknowledge the second byte to end the read
transaction.
Communication may be terminated by sending a
premature STOP or START condition on the bus, or by not
sending the acknowledge.
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