ADS7831 Datasheet, PDF (9/10 Pages) Burr-Brown (TI) – 12-Bit 600kHz Sampling CMOS ANALOG-to-DIGITAL CONVERTER

CALIBRATION
The ADS7831 can be trimmed in hardware or software. The
offset should be trimmed before the gain since the offset
directly affects the gain.
Hardware Calibration
To calibrate the offset and gain of the ADS7831, install the
proper resistors and potentiometers as shown in Figure 4a.
The calibration range is ±12mV for the offset and ±30mV
for full scale.
Potentiometer P₁ and resistor R₁ form the offset adjust
circuit and P₂ and R₂ the gain adjust circuit. The exact values
are not critical. R₁ and R₂ should not be made any larger than
the value shown. They can easily be made smaller to
provide increased adjustment range. Reducing these below
15% of the indicated values could begin to adversely affect
the operation of the converter.
P₁ and P₂ can also be made larger to reduce power dissipa-
tion. However, larger resistances will push the useful adjust-
ment range to the edges of the potentiometer. P should
1
probably not exceed 20kΩ and P2 100kΩ in order to main-
tain reasonable sensitivity.
Software Calibration or No Calibration
The ADS7831 does not require external resistors for its
basic operation. However, the component is designed to be
used with an external 50Ω resistor on the input, and the
specifications apply to this condition. If this resistor is not
used, the only specification that will be affected is total
unadjusted error.
With the 50Ω resistor, the nominal input voltage range is
±2.5V and the total unadjusted error is ±10LSBs guaran-
teed. Without the 50Ω resistor, the nominal input voltage
range will be ±2.46V and the total unadjusted error is not
guaranteed. While it will typically be much less, the total
unadjusted error could be as high as ±20LSBs.
R/C
CS
BUSY
t₁₁
t₁₁
t₁
t₃
t₅
t₄
MODE Acquire
DATA
BUS
t₆
Convert
t₇
t₂
Hi-Z State
FIGURE 3. Using CS to Control Conversion and Read Timing.
t₁₁
t₁₁
Acquire
Data Valid HI Z State
t₁₃
t₉
50Ω
V_IN
+5V
P₁
5kΩ
R₁
20kΩ
+5V
–5V
P₂
5kΩ
R₂
604kΩ
0.1µF
+
10µF
V_IN
AGND1
REF
CAP
AGND2
50Ω
V_IN
V_IN
AGND1
0.1µF
+
10µF
REF
CAP
AGND2
NOTE: Use 1% metal film resistors. Trim offset at 0V first, then trim
gain at 2.5V.
FIGURE 4a. Circuit Diagram With External Hardware Trim. FIGURE 4b. Circuit Diagram Without External Hardware Trim.
®
9
ADS7831