VFC110 Datasheet, PDF (8/8 Pages) Burr-Brown (TI) – High-Frequency VOLTAGE-TO-FREQUENCY CONVERTER

tor). This can be implemented with counter/timer peripheral
chips available for many popular microprocessor families.
Many micro-controllers have counter inputs that can be
programmed for frequency measurement.
Since f_OUT is an open-collector device, the negative-going
edge provides the fastest logic transition. Clocking the counter
on the falling edge will provide the best results in noisy
environments.
Frequency can also be measured by accurately timing the
period of one or more cycles of the VFC’s output. Frequency
must then be computed since it is inversely proportional to
the measured period. This measurement technique can pro-
vide higher measurement resolution in short conversion
times. It is the method used in most high-performance
laboratory frequency counters. It is usually necessary to
offset the transfer function so 0V input causes a finite
frequency out. Otherwise the output period (and therefore the
conversion time) approaches infinity.
FREQUENCY NOISE
Frequency noise (small random variation in the output
frequency) limits the useful resolution of fast frequency
measurement techniques. Long measurement time averages
the effect of frequency noise and achieves the maximum
useful resolution. The VFC110 is designed to minimize
frequency noise and allows improved useful resolution with
short measurement times. The typical curve “Frequency
Count Repeatability vs Counter Gate Time” shows the effect
of noise as the counter gate time is varied. It shows the one
standard deviation (1σ) count variation (as a percentage of
FS counts) versus counter gate time.
FREQUENCY-TO-VOLTAGE CONVERSION
The VFC110 can also be connected as a frequency-to-
voltage converter (Figure 4). Input frequency pulses are
applied to the comparator input. A negative-going pulse
crossing 0V initiates a reference current pulse which is
averaged by the integrator op amp. The values of the one-
shot capacitor and feedback resistor (same as R_IN) are deter-
mined with Table I. The input frequency pulse must not
remain negative for longer than the duration of the one-shot
period. Figure 4 shows the required timing to assure this. If
the negative-going input frequency pulses are longer in
duration, the capacitive coupling circuit shown can be used.
Level shift or capacitive coupling circuitry should not pro-
vide pulses which go lower than –5V or damage to the
comparator input may occur.
This frequency-to-voltage converter operates by averaging
(filtering) the reference current pulses triggered on every
falling edge at the frequency input. Voltage ripple with a
frequency equal to the input will be present in the output
voltage. The magnitude of this ripple voltage is inversely
proportional to the integrator capacitor. The ripple can be
made arbitrarily small with a large capacitor, but at the
sacrifice of settling time. The R-C time constant of C_INT and
R_IN determine the settling behavior. A better compromise
between output ripple and settling time can be achieved by
adding a low-pass filter following the voltage output.
Long Pulses OK
f_IN
1nF
f_IN
TTL
1k Ω
1/10f_FS max
+V_S
12k Ω
2.2k Ω
4.7k Ω
–V_S
NC 2
14
R _IN
C _INT
1
V_OUT = 0 to 10V
12 11
+V_S
10
One-Shot
V _REF
4
–V_S
FIGURE 4. Frequency-to-Voltage Conversion.
13
3
6
C _OS
NC
8 NC
7
5 ^NC
®
VFC110
8