PGA2311_06 Datasheet, PDF (8/17 Pages) Burr-Brown (TI) – Stereo Audio VOLUME CONTROL

PGA2311
SBOS218A – DECEMBER 2001 – REVISED JUNE 2002
SERIAL CONTROL PORT
The serial control port is utilized to program the gain set-
tings for the PGA2311. The serial control port includes
three input pins and one output pin. The inputs include
CS (pin 2), SDI (pin 3), and SCLK (pin 6). The sole output
pin is SDO (pin 7).
The CS pin functions as the chip select input. Data may
be written to the PGA2311 only when CS is LOW. SDI
is the serial data input pin. Control data is provided as
a 16-bit word at the SDI pin, 8 bits each for the left and
right channel gain settings.
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Data is formatted as MSB first, straight binary code.
SCLK is the serial clock input. Data is clocked into SDI
on the rising edge of SCLK.
SDO is the serial data output pin, and is used when
daisy-chaining multiple PGA2311 devices. Daisy-chain
operation is described in detail later in this section. SDO
is a tri-state output, and assumes a high impedance state
when CS is HIGH.
The protocol for the serial control port is shown in
Figure 2. See Figure 3 for detailed timing specifications
for the serial control port.
Gain Byte Format is MSB First, Straight Binary
R0 is the Least Significant Bit of the Right Channel Gain Byte
R7 is the Most Significant Bit of the Right Channel Gain Byte
L0 is the Least Significant Bit of the Left Channel Gain Byte
L7 is the Most Significant Bit of the Left Channel Gain Byte
SDI is latched on the rising edge of SCLK.
SDO transitions on the falling edge of SCLK.
Figure 2. Serial Interface Protocol.
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