ADS822 Datasheet, PDF (8/12 Pages) Burr-Brown (TI) – 10-Bit, 40MHz Sampling ANALOG-TO-DIGITAL CONVERTERS

APPLICATION INFORMATION
THEORY OF OPERATION
The ADS822 and ADS825 are high-speed CMOS analog-to-
digital converters which employ a pipelined converter archi-
tecture consisting of 9 internal stages. Each stage feeds its
data into the digital error correction logic ensuring excellent
differential linearity and no missing codes at the 10-bit level.
The output data becomes valid on the rising clock edge (see
Timing Diagram). The pipeline architecture results in a data
latency of 5 clock cycles.
The analog inputs of the ADS822 and ADS825 are differen-
tial track-and-hold (see Figure 1). The differential topology,
along with tightly matched capacitors, produce a high level
of AC performance while sampling at very high rates.
The ADS822 and ADS825 allow their analog inputs to be
driven either single-ended or differentially. The typical con-
figuration for the ADS822 and ADS825 is the single-ended
mode in which the input track-and-hold performs a single-
ended-to-differential conversion of the analog input signal.
The selection for the optimum interface configuration will
depend on the individual application requirements and sys-
tem structure. For example, communications applications
often process a band of frequencies that do not include DC,
whereas in imaging applications, the previously restored DC
level must be maintained correctly up to the A/D converter.
Features on the ADS822 and ADS825, such as the input
range select (RSEL pin) or the option for an external
reference, provide the needed flexibility to accommodate a
wide range of applications. In any case, the ADS822 and
ADS825 should be configured such that the application
objectives are met while observing the headroom require-
ments of the driving amplifier in order to yield the best
overall performance.
INPUT CONFIGURATIONS
AC-Coupled, Single-Supply Interface
Figure 2 shows the typical circuit for an AC-coupled analog
input configuration of the ADS822 and ADS825 while all
components are powered from a single +5V supply.
Both inputs (IN, IN) require external biasing using a com-
mon-mode voltage that is typically at the mid-supply level
(+V_S/2).
The following application discussion focuses on the single-
ended configuration. Typically, its implementation is easier
to achieve and the rated specifications for the ADS822 and
ADS825 are characterized using the single-ended mode of
operation.
DRIVING THE ANALOG INPUT
The ADS822 and ADS825 achieve excellent AC performance
either in the single-ended or differential mode of operation.
Op Amp
Bias
V_CM
φ1
φ1
C_H
IN
φ1 _φ2
IN
φ1
C_I
φ1
C_I
φ1
φ2
C_H
φ2
φ1
Input Clock (50%)
Op Amp
V_CM
Bias
Internal Non-overlapping Clock
φ1
φ2
φ1
OUT
OUT
FIGURE 1. Simplified Circuit of Input Track-and-Hold with
Timing Diagram.
With the RSEL pin connected high, the full-scale input
range is set to 2Vp-p. In this configuration, the top and
bottom references (REFT, REFB) provide an output voltage
of +3.5V and +1.5V, respectively. Two resistors ( 2x 1.62kΩ)
are used to create a common-mode voltage (V_CM) of ap-
proximately +2.5V to bias the inputs of the driving amplifier
A1. Using the OPA680 on a single +5V supply, its ideal
common-mode point is at +2.5V which coincides with the
recommended common-mode input level for the ADS822
and ADS825. This obviates the need of a coupling capacitor
between the amplifier and the converter. Even though the
OPA680 has an AC gain of +2, the DC gain is only +1 due
to the blocking capacitor at resistor R_G.
The addition of a small series resistor (R_S) between the
output of the op amp and the input of the ADS822 and
ADS825 will be beneficial in almost all interface configura-
tions. This will decouple the op amp’s output from the
capacitive load and avoid gain peaking, which can result in
increased noise. For best spurious and distortion perfor-
mance, the resistor value should be kept below 100Ω.
Furthermore, the series resistor in combination with the
10pF capacitor establishes a passive low-pass filter limiting
the bandwidth for the wideband noise, thus helping improve
the SNR performance.
AC-Coupled, Dual Supply Interface
The circuit provided in Figure 3 shows typical connections
for the analog input in case the selected amplifier operates
on dual supplies. This might be necessary to take full
advantage of very low distortion operational amplifiers, like
the OPA642. The advantage is that the driving amplifier can
be operated with a ground referenced bipolar signal swing.
This will keep the distortion performance at its lowest since
the signal range stays within the linear region of the op amp
and sufficient headroom to the supply rails can be main-
tained. By capacitively coupling the single-ended signal to
the input of the ADS822 and ADS825, its common-mode
requirements can easily be satisfied with two resistors con-
nected between the top and bottom reference.
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ADS822, ADS825
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