CS49300 Datasheet, PDF (76/86 Pages) Cirrus Logic – Multi-Standard Audio Decoder Family

CS49300 Family DSP
11.3. Output Data Hardware Configuration
The naming convention for the DAO configuration
is as follows:
OUTPUT A B C D E
where the parameters are defined as:
A - DAO Mode (Master/Slave for LRCLK and
SCLK)
B - Data Format
C - MCLK Frequency
D - SCLK Frequency
E - SCLK Polarity
The following tables show the different values for
each parameter as well as the hex message that
needs to be sent. When creating the hardware
configuration message, only one hex message
should be sent per parameter.
DAO Modes (LRCLK &
A Value
SCLK)
0
MCLK - Slave
(default) SCLK - Slave
LRCLK - Slave
1
MCLK - Slave
SCLK - Master
LRCLK - Master
2
MCLK - Master
SCLK - Master
LRCLK - Master
Hex
Message
0x80017F
0x400000
0x80027F
0xBFFFFF
0x80027F
0xBFDFFF
Table 22. Output Clock Configuration
(Parameter A)
DAO Data Format Of
AUDATA0, 1, 2 (or AUDATA0 Hex
B Value for Multichannel Modes) Message
0
(default)
I²S 24-bit
(Configuration of AUDATA3 as S/PDIF
(IEC60958) or Digital Audio in the
format of I²S or Left Justified is
covered in AN162 and AN163)
0x80027F
0xFC7FFF
0x80027C
0xF01F00
0x80027D
0xF01F00
0x80027E
0xF01F00
0x80017F
0x038000
0x80017C
0x000001
0x80017D
0x000001
0x80017E
0x000001
1
Left Justified 24-bit
0x80027F
(Configuration of AUDATA3 as S/PDIF _0xFC7FFF
(IEC60958) or Digital Audio in the
format of I²S or Left Justified is
covered in AN162 and AN163)
0x80027C
0xF01F00
0x80027D
0xF01F00
0x80027E
0xF01F00
0x80017F
0x018000
2
Multichannel (6 channel)
0x80027F
20-bit Left Justified
0xFC7FFF
(SCLK must be at least 128Fs 0x80027C
for this mode)
0xF00000
(Configuration of AUDATA3 as S/PDIF _0x80017C
(IEC60958) or Digital Audio in the
format of I²S or Left Justified is
covered in AN162 and AN163)
0x001300
0x80027D
0xF00000
0x80017D
0x001300
0x80027E
0xF00000
0x80017E
0x001300
Table 23. Output Data Format Configuration
(Parameter B)
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DS339PP4