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SHC5320 Datasheet, PDF (7/10 Pages) Burr-Brown (TI) – High-Speed, Bipolar, Monolithic SAMPLE/HOLD AMPLIFIER
a large ground plane surrounding the sample/hold. Bypass
capacitors (0.01µF to 0.1µF ceramic in parallel with 1µF to
10µF tantalum) should be connected from each power sup-
ply terminal of the device to pin 13 (Supply Common).
OFFSET ADJUSTMENT
Offset adjustment capability may be achieved by connecting
a 10kΩ, 10-turn potentiometer as illustrated in Figure 3.
R2
R1
1
2
Input
Optional
11 External CH
7
–VCC
3
10kΩ
4
SHC5320
5
FIGURE 3. Connection of Offset Adjustment Potentiometer.
NONINVERTING MODE
The most common application of the SHC5320 will utilize
the connection illustrated in Figure 4. In this mode of
operation, the sample/hold will operate as a unity-gain
noninverting amplifier when in the Sample mode, and the
output signal will track the input. The high bandwidth of the
SHC5320 and the large open-loop gain assure that gain error
will be minimized.
14
Mode
Control
6
Signal
Common
8
0.1 CH
FIGURE 5. Noninverting Configuration with Gain = 1 + R2/R1.
R2
Input R1
1
2
Optional
11 External CH
100pF
7
Signal
Common
14
Mode
Control
6
8
0.1 CH
1
2
Input
Optional
11 External CH
7
FIGURE 6. Inverting Configuration with Gain = –(R2/R1).
INVERTING MODE
Unlike most sample/holds, the SHC5320 may also be con-
nected to act as an inverting amplifier, as shown in Figure 6.
For this configuration, the gain is equal to –R /R .
21
14
Mode
Control
6
Signal
Common
8
0.1 CH
FIGURE 4. Noninverting Unity-Gain Connections.
When sampling lower-amplitude signals, the SHC5320 may
also be connected as a noninverting amplifier with gain, as
illustrated in Figure 5. In this circuit the gain of the amplifier
is equal to –R2/R1 when sampling.
The Burr-Brown SHC5320 uses current sources to bias the
internal amplifiers. This means that the bias of the amplifiers
is not dependent on the common-mode voltage of the input
signal. This makes the spurious free dynamic range in the
non-inverting mode equal that of the inverting mode.
INPUT OVERLOAD PROTECTION
It is possible that the input transconductance amplifier of the
SHC5320 will saturate when the unit is in the Hold mode,
due to a non-zero differential signal appearing between pins
1 and 2. This differential signal may be the result of a rapidly
changing input signal or application of a new channel from
an input multiplexer. When the input buffer is saturated in
this fashion, acquisition time may be degraded because of
the time required for the buffer to recover from saturation. In
addition, the input buffer, which is designed to provide large
amounts of charging current to the output integrator, may
draw large amounts of supply current which may exceed
40mA peak in some applications. For these reasons, it is
desirable to limit the differential voltage which may appear
at the summing junction of the input buffer. Figures 7 and 8
illustrate possible methods of providing this voltage limita-
tion for the inverting and noninverting configurations. The
®
7
SHC5320