OPA2650 Datasheet, PDF (7/12 Pages) Burr-Brown (TI) – Dual Wideband, Low Power Voltage Feedback OPERATIONAL AMPLIFIER

TYPICAL PERFORMANCE CURVES (CONT)
At T_A = +25°C, V_S = ±5V, R_L = 100Ω, and R_FB = 402Ω, unless otherwise noted. R_FB = 25Ω for a gain of +1.
HARMONIC DISTORTION vs GAIN
(f = 5MHZ, V_O = 2Vp-p)
–40
3f_O
–50
–60
–70
2f_O
–80
1 2 3 4 5 6 7 8 9 10
Non-Inverting Gain (V/V)
APPLICATIONS INFORMATION
DISCUSSION OF PERFORMANCE
The OPA2650 is a dual low power, wideband voltage feed-
back operational amplifier. Each channel is internally com-
pensated to provide unity gain stability. The OPA2650’s
voltage feedback architecture features true differential and
fully symmetrical inputs. This minimizes offset errors, mak-
ing the OPA2650 well suited for implementing filter and
instrumentation designs. As a dual operational amplifier,
OPA2650 is an ideal choice for designs requiring multiple
channels where reduction of board space, power dissipation
and cost are critical. Its AC performance is optimized to
provide a gain bandwidth product of 160MHz and a fast 0.1%
settling time of 11ns, which is an important consideration in
high speed data conversion applications. Along with its
excellent settling characteristics, the low DC input offset of
±1mV and drift of ±3µV/°C support high accuracy require-
ments. In applications requiring a higher slew rate and wider
bandwidth, such as video and high bit rate digital communi-
cations, consider the dual current feedback OPA2658.
CIRCUIT LAYOUT AND BASIC OPERATION
Achieving optimum performance with a high frequency am-
plifier like the OPA2650 requires careful attention to layout
parasitics and selection of external components. Recommen-
dations for PC board layout and component selection include:
a) Minimize parasitic capacitance to any ac ground for all
of the signal I/O pins. Parasitic capacitance on the output
and inverting input pins can cause instability; on the non-
inverting input it can react with the source impedance to
cause unintentional bandlimiting. To reduce unwanted ca-
pacitance, a window around the signal I/O pins should be
opened in all of the ground and power planes. Otherwise,
ground and power planes should be unbroken elsewhere on
the board.
b) Minimize the distance (< 0.25") from the two power pins
to high frequency 0.1µF decoupling capacitors. At the pins,
the ground and power plane layout should not be in close
proximity to the signal I/O pins. Avoid narrow power and
ground traces to minimize inductance between the pins and
the decoupling capacitors. Larger (2.2µF to 6.8µF) decoupling
capacitors, effective at lower frequencies, should also be
used. These may be placed somewhat farther from the
device and may be shared among several devices in the same
area of the PC board.
c) Careful selection and placement of external compo-
nents will preserve the high frequency performance of the
OPA2650. Resistors should be a very low reactance type.
Surface mount resistors work best and allow a tighter overall
layout. Metal film or carbon composition axially-leaded
resistors can also provide good high frequency performance.
Again, keep their leads as short as possible. Never use
wirewound type resistors in a high frequency application.
Since the output pin and the inverting input pin are most
sensitive to parasitic capacitance, always position the feed-
back and series output resistor, if any, as close as possible to
the package pins. Other network components, such as non-
inverting input termination resistors, should also be placed
close to the package.
Even with a low parasitic capacitance shunting the resistor,
excessively high resistor values can create significant time
constants and degrade performance. Good metal film or
surface mount resistors have approximately 0.2pF in shunt
with the resistor. For resistor values > 1.5kΩ, this adds a
pole and/or zero below 500MHz that can affect circuit
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OPA2650