CS61583 Datasheet, PDF (7/44 Pages) Cirrus Logic – DUAL T1/E1 LINE INTERFACE

t_r
t_f
90%
Any Digital Output
10%
90%
10%
Figure 1. Signal Rise and Fall Characteristics
CS61583
RCLK
(CLKE = 1)
tpw1
t _pwl1
t _pwh1
RPOS
RNEG
RDATA
BPV
RCLK
(CLKE =0)
t _su1
t _h1
Figure 2. Recovered Clock and Data Switching Characteristics
t _pwh2
t _pw2
TCLK
t _su2
t _h2
TPOS
TNEG
TDATA
Figure 3. Transmit Clock and Data Switching Characteristics
DS172PP5
7