CS4329 Datasheet, PDF (7/36 Pages) Cirrus Logic – 20-Bit, Stereo D/A Converter for Digital Audio

CS4329
GENERAL DESCRIPTION
The CS4329 is a complete stereo digital-to-analog
system including 128× digital interpolation, fourth-
order delta-sigma digital-to-analog conversion,
128× oversampled one-bit delta-sigma modulator
and analog filtering. This architecture provides a
high insensitivity to clock jitter. The DAC converts
digital data at any input sample rate between 1 and
50 kHz, including the standard audio rates of 48,
44.1 and 32 kHz.
The primary purpose of using delta-sigma modula-
tion techniques is to avoid the limitations of laser
trimmed resistive DAC architectures by using an
inherently linear 1-bit DAC. The advantages of a 1-
bit DAC include: ideal differential linearity, no dis-
tortion mechanisms due to resistor matching errors
and no linearity drift over time and temperature due
to variations in resistor values.
Digital Interpolation Filter
The digital interpolation filter increases the sample
rate by a factor of 4 and is followed by a 32× digital
sample-and hold to effectively achieve a 128× in-
terpolation filter. This filter eliminates images of
the baseband audio signal which exist at multiples
of the input sample rate, Fs. This allows for the se-
lection of a less complex analog filter based on out-
of-band noise attenuation requirements rather than
anti-image filtering. Following the interpolation
filter, the resulting frequency spectrum has images
of the input signal at multiples of 128× the input
sample rate. These images are removed by the ex-
ternal analog filter.
Delta-Sigma Modulator
The interpolation filter is followed by a fourth-or-
der delta-sigma modulator which converts the 24-
bit interpolation filter output into 1-bit data at
128× Fs.
Switched-Capacitor Filter
The delta-sigma modulator is followed by a digital-
to-analog converter which translates the 1-bit data
into a series of charge packets. The magnitude of
the charge in each packet is determined by sam-
pling of a voltage reference onto a switched capac-
itor, where the polarity of each packet is controlled
by the 1-bit signal. This technique greatly reduces
the sensitivity to clock jitter and is a major im-
provement over earlier generations of 1-bit digital-
to-analog converters where the magnitude of
charge in the D-to-A process is determined by
switching a current reference for a period of time
defined by the master clock.
The CS4329 incorporates a differential output to
maximize the output level to minimize the amount
of gain required in the output analog stage. The dif-
ferential output also allows for the cancellation of
common mode errors in the differential to singled-
ended converter.
Interpolator
Delta-Sigma
Modulator
DAC
Analog
Low-Pass
Filter
Figure 2. Block Diagram
AOUTL+
AOUTL-
DS153F1
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