CS42418 Datasheet, PDF (35/67 Pages) Cirrus Logic – 110 dB, 192kHz 8-Ch CODEC WITH PLL

CS42418
DIF1
0
0
1
1
DIF0
0
1
0
1
Description
Left Justified, up to 24-bit data
I²S, up to 24-bit data
Right Justified, 16-bit or 24-bit data
reserved
Table 7. Digital Interface Formats
Format
0
1
2
-
Figure
9
8
7
-
5.5.2 ADC ONE_LINE MODE (ADC_OLX)
Default = 00
Function:
These bits select which mode the ADC will use. By default one-line mode is disabled but can be se-
lected using these bits. Please see Figures 10 and 11 to see the format of one-line mode 1 and
one-line mode 2.
ADC_OL1
0
0
1
1
ADC_OL2
0
1
0
1
Description
DIF: take the DIF setting from reg04h[7:6]
One-Line #1
One-Line #2
reserved
Table 8. ADC One_Line Mode
Format
-
3
4
-
Figure
-
10
11
-
5.5.3 DAC ONE_LINE MODE (DAC_OLX)
Default = 00
Function:
These bits select which mode the DAC will use. By default one-line mode is disabled but can be se-
lected using these bits. Please see Figures 10 and 11 to see the format of one-line mode 1 and
one-line mode 2.
DAC_OL1
0
0
1
1
DAC_OL2
0
1
0
1
Description
DIF: take the DIF setting from reg04h[7:6]
One-Line #1
One-Line #2
reserved
Table 9. DAC One_Line Mode
Format
-
3
4
-
Figure
-
10
11
-
5.5.4 CODEC RIGHT JUSTIFIED BITS (CODEC_RJ16)
Default = 0
Function:
This bit determines how many bits to use during right justified mode for the DAC and ADC. By default
the DAC and ADC will be in RJ24 bits but can be set to RJ16 bits.
0 - 24 bit mode.
1 - 16 bit mode.
35