OPA124 Datasheet, PDF (3/8 Pages) Burr-Brown (TI) – Low Noise Precision Difet OPERATIONAL AMPLIFIER

CONNECTION DIAGRAMS
Top View
Offset Trim 1
–In 2
+In 3
–V_S 4
DIP
8 Substrate
7 +V_S
6 Output
5 Offset Trim
Top View
SOIC
NC 1
–In 2
+In 3
–V_S 4
8 Substrate
7 +V_S
6 Output
5 NC
NC = No Connect
PACKAGE/ORDERING INFORMATION
PRODUCT
PACKAGE
PACKAGE
DRAWING NUMBER⁽¹⁾
TEMPERATURE
RANGE
BIAS
CURRENT
pA, max
OPA124U
OPA124P
OPA124UA
OPA124PA
OPA124PB
8-Lead SOIC
8-Pin Plastic DIP
8-Lead SOIC
8-Pin Plastic DIP
8-Pin Plastic DIP
182
–25°C to +85°C
5
006
–25°C to +85°C
5
182
–25°C to +85°C
2
006
–25°C to +85°C
2
006
–25°C to +85°C
1
NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book.
OFFSET
DRIFT
µV/°C, max
7.5
7.5
4
4
2
ABSOLUTE MAXIMUM RATINGS⁽¹⁾
Supply ........................................................................................... ±18VDC
Internal Power Dissipation⁽²⁾ ......................................................... 750mW
Differential Input Voltage⁽³⁾ .......................................................... ±36VDC
Input Voltage Range⁽³⁾ ................................................................. ±18VDC
Storage Temperature Range .......................................... –65°C to +150°C
Operating Temperature Range ....................................... –40°C to +125°C
Lead Temperature (soldering, 10s) ................................................ +300°C
Output Short Circuit Duration⁽⁴⁾ ............................................... Continuous
Junction Temperature .................................................................... +175°C
NOTES: (1) Stresses above these ratings may cause permanent damage.
(2) Packages must be derated based on θ_JA = 90°C/W for PDIP and 100°C/W
for SOIC. (3) For supply voltages less than ±18VDC, the absolute maximum
input voltage is equal to +18V > V_IN > –V_CC – 6V. See Figure 2. (4) Short circuit
may be to power supply common only. Rating applies to +25°C ambient.
Observe dissipation limit and T_J.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
3
OPA124