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LOG100 Datasheet, PDF (3/9 Pages) Burr-Brown (TI) – Precision LOGARITHMIC AND LOG RATIO AMPLIFIER
SPECIFICATIONS (CONT)
ELECTRICAL
TA = +25°C and ±VCC = ±15V, after 15 minute warm-up, unless otherwise specified.
PARAMETER
CONDITIONS
MIN
POWER SUPPLY REQUIREMENTS
Rated Voltage
Operating Range
Derated Performance
±12
Quiescent Current
AMBIENT TEMPERATURE RANGE
Specification
0
Operating Range
Derated Performance
–25
Storage
–40
LOG100JP
TYP
±15
±7
MAX
±18
±9
+70
+85
+85
UNITS
VDC
VDC
mA
°C
°C
°C
NOTES: (1) Log Conformity Error is the peak deviation from the best-fit straight line of the VOUT vs Log IIN curve expressed as a percent of peak-to-peak full scale
output. (2) May be trimmed to other values. See Applications section. (3) The worst-case Total Error for any ratio of I1/I2 is the largest of the two errors when
I1 and I2 are considered separately. (4) Total Error at other values of K is K times Total Error for K = 1. (5) Guaranteed by design. Not directly measurable due to
amplifier’s committed configuration. (6) 3dB and transient response are a function of both the compensation capacitor and the level of input current. See Typical
Performance Curves.
ABSOLUTE MAXIMUM RATINGS
Supply ................................................................................................ ±18V
Internal Power Dissipation .............................................................. 600mV
Input Current ..................................................................................... 10mA
Input Voltage Range .......................................................................... ±18V
Storage Temperature Range ........................................... –40°C to +85°C
Lead Temperature (soldering, 10s) ............................................... +300°C
Output Short-circuit Duration .................................. Continuous to ground
Junction Temperature ...................................................................... 175°C
SCALE FACTOR PIN CONNECTIONS
K, V/DECADE
5
3
1.9
1
0.85
0.77
0.68
CONNECTIONS
5 to 7
4 to 7
4 and 5 to 7
3 to 7
3 and 5 to 7
3 and 4 to 7
3 and 4 and 5 to 7
FREQUENCY COMPENSATION
9
1
7
LOG100
14
10
6543
CC
PIN CONFIGURATION
Bottom View
I2 Input 14
NC 13
NC 12
NC 11
Common 10
–VCC 9
NC 8
1 I1 Input
2 Scale Factor Trim
3 K=1
4 K=3
5 K=5
6 +VCC
7 Output
NC = No Connection
ELECTROSTATIC
DISCHARGE SENSITIVITY
Any integral circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet
published specifications.
ORDERING INFORMATION
MODEL
PACKAGE
LOG100JP 14-Pin Hermetic Ceramic DIP
SPECIFIED
TEMPERATURE
RANGE
0°C to +70°C
PACKAGE INFORMATION
MODEL
PACKAGE
PACKAGE DRAWING
NUMBER(1)
LOG100JP 14-Pin Hermetic Ceramic DIP
148(2)
NOTES: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book. (2) During 1994, the package
was changed from plastic to hermetic ceramic. Pinout, model number, and
specifications remained unchanged. The metal lid of the new package is
internally connected to common, pin 10.
®
3
LOG100