ADS8507 Datasheet, PDF (28/32 Pages) Texas Instruments – 16-BIT 40-KSPS LOW POWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH INTERNAL REFERENCE AND PARALLEL/SERIAL INTERFACE

ADS8507
SLAS381 – DECEMBER 2006
APPLICATION INFORMATION (continued)
Convert Pulse
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QSPI
PCS0/SS
MOSI
SCK
ADS8507
R/C
BUSY
SDATA
DATACLK
CS
EXT/INT
BYTE
CPOL = 0 (Inactive State is LOW)
CPHA = 1 (Data Valid on Falling Edge)
QSPI Port is in Slave Mode.
Figure 49. QSPI Interface to the ADS8507
Before enabling the QSPI interface, the microcontroller must be configured to monitor the slave select line.
When a transition from low to high occurs on slave select (SS) from BUSY (indicating the end of the current
conversion), the port can be enabled. If this is not done, the microcontroller and the A/D converter may be
out-of-sync.
Figure 50 shows another interface between the ADS8507 and a QSPI equipped microcontroller which allows the
microcontroller to give the convert pulses while also allowing multiple peripherals to be connected to the serial
bus. This interface and the following discussion assume a master clock for the QSPI interface of 16.78 MHz.
Notice that the serial data input of the microcontroller is tied to the MSB (D7) of the ADS8507 instead of the
serial output (SDATA). Using D7 instead of the serial port offers 3-state capability which allows other peripherals
to be connected to the MISO pin. When communication is desired with those peripherals, PCS0 and PCS1
should be left high; that keeps D7 3-stated.
QSPI
ADS8507
+5V
PCS0
PCS1
SCK
MISO
R/C EXT/INT
CS
DATACLK
D7 (MSB)
BYTE
CPOL = 0
CPHA = 0
Figure 50. QSPI Interface to the ADS8507, Processor Initiates Conversions
In this configuration, the QSPI interface is actually set to do two different serial transfers. The first, an 8-bit
transfer, causes PCS0 (R/C) and PCS1 (CS) to go low, starting a conversion. The second, a 16-bit transfer,
causes only PCS1 (CS) to go low. This is when the valid data is transferred.
For both transfers, the DT register (delay after transfer) is used to cause a 19-µs delay. The interface is also set
up to wrap to the beginning of the queue. In this manner, the QSPI is a state machine which generates the
appropriate timing for the ADS8507. This timing is thus locked to the crystal-based timing of the microcontroller
and not interrupt driven. So, this interface is appropriate for both AC and DC measurements.
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