ADS8327 Datasheet, PDF (27/40 Pages) Burr-Brown (TI) – LOW POWER, 16-BIT, 500-kHz, SINGLE/DUAL UNIPOLAR INPUT, ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL INTERFACE

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ADS8327
ADS8328
SLAS415A – APRIL 2006 – REVISED MAY 2006
Manual Trigger Case 1
CONVST
N
EOC
(programmed
Active Low)
40 ns MIN
N+1
Converter
State
Resume
N −th Sampling
>=3CCLK
N −th Conversion
=18 CCLK
6 CCLKs
POWERDOWN
Resume N+1 −th Sampling
>=3CCLK
N+1 −th Conversion
=18 CCLK
POWERDOWN
6 CCLKs
Read While Converting
CS
20 ns MIN
Read N−1 −th
Result
20 ns MIN
20 ns MIN
Read N −th
Result
20 ns MIN
Read While Sampling
CS
Read N−1 −th
Result
Manual Trigger Case 2 (wake up by CONVST)
CONVST
N
EOC
(programmed
Active Low)
1 CCLK MIN
20 ns MIN
0 ns MIN
Read N −th
Result
40 ns MIN
N+1
1 CCLK MIN
20 ns MIN
Converter
State
Resume
N −th Sampling
>=3CCLK
N −th Conversion
=18 CCLK
POWER
DOWN
Resume ^{N+1 −th Sampling N+1 −th Conversion}
>=3CCLK
=18 CCLK
POWER
DOWN
Read While Converting
CS
20 ns MIN
Read N−1 −th
Result
20 ns MIN
Read N −th
Result
Read While Sampling
CS
Read N−1 −th
Result
20 ns MIN
20 ns MIN
20 ns MIN
0 ns MIN
Read N −th
Result
20 ns MIN
20 ns MIN
20 ns MIN
Figure 58. Read While Converting vs Read While Sampling with Auto Nap Powerdown
Total Acquisition + Conversion Cycle Time:
Automatic:
= 21 CCLKs
Manual:
≥ 21 CCLKs
Manual + deep powerdown: ≥ 4SCLK + 100 µs + 3 CCLK + 18 CCLK +16 SCLK + 1 µs
Manual + nap powerdown: ≥ 4 SCLK + 3 CCLK + 3 CCLK + 18 CCLK +16 SCLK
Manual + auto nap
powerdown:
≥ 4 SCLK + 3 CCLK + 3 CCLK + 18 CCLK +16 SCLK (use wakeup to resume)
Manual + auto nap
powerdown:
≥ 1 CCLK + 3 CCLK + 3 CCLK + 18 CCLK +16 SCLK (use CONVST to resume)
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