OPA3693_07 Datasheet, PDF (25/31 Pages) Burr-Brown (TI) – Triple, Ultra-Wideband, Fixed-Gain, VIDEO BUFFER with Disable

OPA3693
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emitter. As V_DIS is pulled LOW, additional current is
pulled through the 15kΩ resistor, eventually turning
on these two diodes (≈ 80µA). At this point, any
further current pulled out of V_DIS goes through those
diodes holding the emitter-base voltage of Q1 at
approximately 0V. This shuts off the collector current
out of Q1, turning the amplifier off. The supply
current in the shutdown mode is only that required to
operate the circuit of Figure 58.
The shutdown feature for the OPA3693 is a positive
supply referenced, current-controlled interface.
Open-collector (or drain) interfaces are most
effective, as long as the controlling logic can sustain
the resulting voltage (in the open mode) that appears
at the V_DIS pin. That voltage is one diode below the
positive supply voltage applied to the OPA3693. For
voltage output logic interfaces, the on/off voltage
levels described in the Electrical Characteristics
apply only for a +5V positive supply on the
OPA3693. An open-drain interface is recommended
for shutdown operation using a higher positive supply
for the OPA3693 and/or logic families with
inadequate high-level voltage swings.
THERMAL ANALYSIS
The OPA3693 does not require heatsinking or airflow
in most applications. Maximum desired junction
temperature sets the maximum allowed internal
power dissipation as described here. In no case
should the maximum junction temperature be
allowed to exceed +150°C.
Operating junction temperature (T_J) is given by T_A +
P_D × θ_JA. The total internal power dissipation (P_D) is
the sum of quiescent power (P_DQ) and additional
power dissipated in the output stage (P_DL) to deliver
load power. Quiescent power is simply the specified
no-load supply current times the total supply voltage
across the part. P_DL depends on the required output
signal and load but would, for a grounded resistive
load, be at a maximum when the output is fixed at a
voltage equal to 1/2 either supply voltage (for equal
bipolar supplies). Under this worst-case condition,
P_DL = V_S2/(4 × R_L) where R_L includes feedback
network loading. This value is the absolute highest
power that can be dissipated for a given R_L. All
actual applications dissipate less power in the output
stage.
Note that it is the power in the output stage and not
into the load that determines internal power
dissipation.
As a worst-case example, compute the maximum T_J
using an OPA3693IDBQ (SSOP-16 package) in the
circuit of Figure 42 operating at the maximum
specified ambient temperature of +85°C and driving
a grounded 100Ω load at V_S/2. Maximum internal
power is:
SBOS353 – DECEMBER 2006
P_D = 10V ´ 43.5mA + 3 ´ 5²/(4 ´ (100W || 600W)) = 654mW
Maximum T_J = +85°C + (0.654W ´ 80°C/W) = 137°C
All actual applications operate at a lower junction
temperature than the +137°C computed above.
Compute your actual output stage power to get an
accurate estimate of maximum junction temperature,
or use the results shown here as an absolute
maximum.
BOARD LAYOUT GUIDELINES
Achieving optimum performance with a
high-frequency amplifier such as the OPA3693
requires careful attention to PCB layout parasitics
and external component types. Recommendations
that will optimize performance include:
a) Minimize parasitic capacitance to any ac ground
for all of the signal I/O pins. Parasitic capacitance on
the output can cause instability; on the noninverting
input, it can react with the source impedance to
cause unintentional bandlimiting. To reduce
unwanted capacitance, create a window around the
signal I/O pins in all of the ground and power planes
around those pins. Otherwise, ground and power
planes should be unbroken elsewhere on the board.
b) Minimize the distance (< 0.25”) from the
power-supply pins to high-frequency 0.1µF
decoupling capacitors. At the device pins, the ground
and power plane layout should not be in close
proximity to the signal I/O pins. Avoid narrow power
and ground traces to minimize inductance between
the pins and the decoupling capacitors. The
power-supply connections should always be
decoupled with these capacitors. Larger (2.2µF to
6.8µF) decoupling capacitors, effective at lower
frequency, should also be used on the supply pins.
These may be placed somewhat farther from the
device and may be shared among several devices in
the same area of the PCB.
c) Careful selection and placement of external
components preserve the high-frequency
performance of the OPA3693. Use resistors that
have low reactance at high frequencies.
Surface-mount resistors work best and allow a tighter
overall layout. Metal film and carbon composition
axially-leaded resistors can also provide good
high-frequency performance. Again, keep their leads
and PCB trace length as short as possible. Never
use wirewound type resistors in a high-frequency
application. Since the output pin and inverting input
pin are the most sensitive to parasitic capacitance,
always position the series output resistor, if any, as
close as possible to the output pin. Because the
inverting input node is internal for the OPA3693, it is
more robust to layout issues than amplifiers with
similar speed but external feedback and gain
resistors. Other network components, such as
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