CS22230 Datasheet, PDF (23/29 Pages) Cirrus Logic – WIRELESS PCI/USB CONTROLLER

Table 6. DC Characteristics
Symbol
V_IL
V_IH
V_OL
V_OH
I_IL
I_OZ
I_CC & I_DD
I_EE
Parameter
Voltage Input Low
Voltage Input High
Voltage Output Low
Voltage Output High
Input Leakage Current
3-State Output Leakage Current
Dynamic Supply Current
Note 1
Condition
I_OL = 1500 µA
I_OH = -500 µA
V_IN = V_SS or V_DD
V_OH = V_SS or V_DD
V_{CC & DD} = 5V & 3.3V
V_DD = 1.8V
Min
-0.5
2.0
0.24
-10
-10
Typ Max Units
0.8
V
Vcc + 0.5 V
0.55
V
V
10
µA
10
µA
35
ma
135
5.1 AC Characteristics and Timing
Table 7. System Memory Interface Timing
Parameter
t_dSMD
t_dSMA
t_dSMDQM
t_dSMNCS
t_dSMNWE
t_dSMCKE
t_dSMNCAS
t_dSMNRAS
T_perSMCLK
T_suSMD
T_hSMD
Parameter Description
SMCLK to SMD[31:0] output delay
SMCLK to SMA[11:0] output delay
SMCLK to SMDQM[3:0] output delay
SMCLK to SMNCS[1:0] output delay
SMCLK to SMNWE output delay
SMCLK to SMCKE output delay
SMCLK to SMNCAS output delay
SMCLK to SMNRAS output delay
SMCLK period
SMD[31:0] setup to SMCLK
SMD[31:0] hold from SMCLK
Min
Max Units
7
ns
4.7
ns
5.1
ns
4.1
ns
4.5
ns
4.3
ns
4.0
ns
5.0
ns
72
103
ns
1.0
ns
2.4
ns
Notes:
1.
2.
Outputs are loaded with 35pf on SMD, 25pf on SMA, SMDQM, SMNRAS, and SMNCAS and 20pf on SMCLK,
SMNCS, and SMCKE.
An attempt has been made to balance the setup time needed by the SDRAM and the setup needed by CS22230 to
read data. If there is a problem meeting setup on the SDRAM, there is a programmable delay line on SMCLK which
can help meet the setup time. Care must be taken, however, not to violate the setup on the return read data. The
delay can be increased by a multiple of 0.25ns by using the SMA[11:09] pins to selectively set the clock delay .
CS22230 Mini PCI / USB Wireless Controller
23 of 29
www.cirrus.com
DS558PP1 Rev. 1.0