LOG114_12 Datasheet, PDF (22/29 Pages) Burr-Brown (TI) – Single-Supply, High-Speed, Precision LOGARITHMIC AMPLIFIER

LOG114
SBOS301A − MAY 2004 − REVISED MARCH 2007
For example, in a system configured for measurement
of five decades, with I₁ = 1mA, and I₂ = 10µA:
ǒ Ǔ V_{LOGOUT IDEAL} + 0.375
log
10^*3
10^*5
+ 0.75V
(22)
ǒ Ǔ V_{LOGOUT TYP} + 0.375(1 " 0.004)
log
10^−3*5
10^−5*5
10^−12
10^−12
" 2(0.001)(5) " 0.011
(23)
Using the positive error components (+∆K, +2Nm, and
+V_OSO) to calculate the maximum typical output:
V_{LOGOUT TYP} + 0.774V
(24)
Therefore, the error in percent is:
%error
+
|0.75*0.774|
0.75
100% + 3.2%
(25)
QFN PACKAGE
The LOG114 comes in a QFN-16 package. This lead-
less package has lead contacts on all four sides of the
bottom of the package, thereby maximizing board
space. An exposed leadframe die pad on the bottom of
the package enhances thermal and electrical charac-
teristics.
QFN packages are physically small, have a smaller
routing area, improved thermal performance, and im-
proved electrical parasitics. Additionally, the absence of
external leads eliminates bent-lead issues.
www.ti.com
The QFN package can be easily mounted using stan-
dard printed circuit board (PCB) assembly techniques.
See Application Note QFN/SON PCB Attachment
(SLUA271) and Application Report Quad Flatpack No−
Lead Logic Packages (SCBA017), both available for
download at www.ti.com.
The exposed leadframe die pad on the bottom of
the package should be connected to V−.
QFN LAYOUT GUIDELINES
The exposed leadframe die pad on the QFN package
should be soldered to a thermal pad on the PCB. A me-
chanical drawing showing an example layout is at-
tached at the end of this data sheet. Refinements to this
layout may be necessary based on assembly process
requirements. Mechanical drawings located at the end
of this data sheet list the physical dimensions for the
package and pad. The five holes in the landing pattern
are optional, and are intended for use with thermal vias
that connect the leadframe die pad to the heatsink area
on the PCB.
Soldering the exposed pad significantly improves
board-level reliability during temperature cycling, key
push, package shear, and similar board-level tests.
Even with applications that have low-power dissipation,
the exposed pad must be soldered to the PCB to pro-
vide structural integrity and long-term reliability.
22