DAC7654 Datasheet, PDF (22/28 Pages) Burr-Brown (TI) – 16-Bit, Dual Voltage Output DIGITAL-TO-ANALOG CONVERTER

DAC7654
SBAS263 − NOVEMBER 2003
ANALOG OUTPUTS
When V_SS = –5V (dual-supply operation), the output
amplifier can swing to within 2.25V of the supply rails over
a range of –40°C to +85°C. When V_SS = 0V (single-supply
operation), and with R_LOAD also connected to ground, the
output can swing to within 5mV of ground. Care must be
taken when measuring the zero-scale error when
V_SS = 0V. Since the output voltage cannot swing below
ground, the output voltage may not change for the first few
digital input codes (0000h, 0001h, 0002h, etc.) if the output
amplifier has a negative offset.
Due to the high accuracy of these DACs, system design
problems such as grounding and contact resistance are
very important. A 16-bit converter with a 2.5V full-scale
range has a 1LSB value of 38µV. With a load current of
1mA, series wiring and connector resistance of only 40mΩ
(R_W2) will cause a voltage drop of 40µV, as shown in
Figure 56. To understand what this means in terms of
system layout, the resistivity of a typical 1-ounce
copper-clad printed circuit board is 1/2 mΩ per square. For
a 1mA load, a 0.01-inch-wide printed circuit conductor 0.6
inches long will result in a voltage drop of 30µV.
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The DAC7654 offers a force and sense output
configuration for the high open-loop gain output amplifier.
This feature allows the loop around the output amplifier to
be closed at the load (as shown in Figure 56), thus
ensuring an accurate output voltage.
DIGITAL INTERFACE
Table 1 shows the basic control logic for the DAC7654.
The interface consists of a signal data clock (CLK) input,
serial data in (SDI), DAC input register load control signal
(LOAD), and DAC register load control signal (LDAC). In
addition, a chip select (CS) input is available to enable
serial communication when there are multiple serial
devices. An asynchronous reset (RST) input, by the rising
edge, is provided to simplify startup conditions, periodic
resets, or emergency resets to a known state, depending
on the status of the reset select (RSTSEL) signal.
R_W1
V_OUTA Sense1 6
R_W2
DAC7654
V_OUTA 5
AGND 8
V_OUTB Sense1 59
V_OUTB 58
R_W1
R_W2
V_OUT
V_OUT
Figure 56. Analog Output Closed-Loop Configuration (1/2 DAC7654). R_W represents wiring resistances.
Table 1. DAC7654 Logic Truth Table
A1
A0
CS
RST RSTSEL LDAC LOAD INPUT REGISTER DAC REGISTER
MODE
DAC
L
L
L
H
X
X
L
Write
Hold
Write input
A
L
H
L
H
X
X
L
Write
Hold
Write input
B
H
L
L
H
X
X
L
Write
Hold
Write input
C
H
H
L
H
X
X
L
Write
Hold
Write input
D
X
X
H
H
X
↑
H
Hold
Write
Update
All
X
X
H
H
X
H
H
Hold
Hold
Hold
All
X
X
X
↑
L
X
X
Reset to zero
Reset to zero
Reset to zero
All
X
X
X
↑
H
X
X Reset to mid-scale Reset to mid-scale Reset to mid-scale All
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