OPA4684 Datasheet, PDF (21/26 Pages) Burr-Brown (TI) – Quad, Low-Power, Current-Feedback OPERATIONAL AMPLIFIER

terms in either nV/√Hz or pA/√Hz.
The total output spot noise voltage can be computed as the
square root of the sum of all squared output noise voltage
contributors. Equation 3 shows the general form for the
output noise voltage using the terms presented in Figure 12.
(3)
( ) ( ) E_O =
_ENI2
+
I_BNR_S
2
+
4kTR_S


G_N2
+
I_BIR_F
2
+ 4kTR_FG_N
Dividing this expression by the noise gain (G_N = (1+R_F/R_G))
will give the equivalent input referred spot noise voltage at
the noninverting input, as shown in Equation 4.
(4)
( ) E_N =
E_NI2
+
I_BNR_S
2
+ 4kTR_S
+


I_BIR_F
G_N


2
+
4kTR_F
G_N
Evaluating these two equations for the OPA4684 circuit and
component values presented in Figure 1 will give a total
output spot noise voltage of 16.3nV/√Hz and a total equiva-
lent input spot noise voltage of 8.1nV/√Hz. This total input
referred spot noise voltage is higher than the 3.7nV/√Hz
specification for the op amp voltage noise alone. This re-
flects the noise added to the output by the inverting current
noise times the feedback resistor. As the gain is increased,
this fixed output noise power term contributes less to the
total output noise and the total input referred voltage noise
given by Equation 3 will approach just the 3.7nV/√Hz of the
op amp itself. For example, going to a gain of +20 in the
circuit of Figure 1, adjusting only the gain resistor to 42.1Ω,
will give a total input referred noise of 3.9nV/√Hz. A more
complete description of op amp noise analysis can be found
in the Texas Instruments application note, AB-103, “Noise
Analysis for High Speed Op Amps” (SBOA066), located at
www.ti.com.
DC ACCURACY AND OFFSET CONTROL
A current-feedback op amp like the OPA4684 provides
exceptional bandwidth in high gains, giving fast pulse settling
but only moderate DC accuracy. The Electrical Characteris-
tics show an input offset voltage comparable to high slew
rate voltage-feedback amplifiers. However, the two input
bias currents are somewhat higher and are unmatched.
Whereas bias current cancellation techniques are very effec-
tive with most voltage-feedback op amps, they do not gen-
erally reduce the output DC offset for wideband current-
feedback op amps. Since the two input bias currents are
unrelated in both magnitude and polarity, matching the
source impedance looking out of each input to reduce their
error contribution to the output is ineffective. Evaluating the
configuration of Figure 1, using worst-case +25°C input offset
voltage and the two input bias currents, gives a worst-case
output offset range equal to:
±(NG • V_OS(MAX)) + (I_BN • R_S/2 • NG) ± (I_BI • R_F)
where NG = noninverting signal gain
= ±(2 • 4.0mV) ± (13µA • 25Ω • 2) ± (800Ω • 17µA)
= ±8mV + 0.65mV ± 13.6mV
= ±22.3mV
While the last term, the inverting bias current error, is
dominant in this low-gain circuit, the input offset voltage will
become the dominant DC error term as the gain exceeds
5V/V. Where improved DC precision is required in a high-
speed amplifier, consider the OPA656 single and OPA2822
dual voltage-feedback amplifiers.
THERMAL ANALYSIS
The OPA4684 will not require external heatsinking or airflow
most applications. Maximum desired junction temperature
will set the maximum allowed internal power dissipation as
described below. In no case should the maximum junction
temperature be allowed to exceed 175°C.
Operating junction temperature (T_J) is given by T_A + P_D • θ_JA.
The total internal power dissipation (P_D) is the sum of
quiescent power (P_DQ) and additional power dissipated in the
output stage (P_DL) to deliver load power. Quiescent power is
simply the specified no-load supply current times the total
supply voltage across the part. P_DL will depend on the
required output signal and load but would, for a grounded
resistive load, be at a maximum when the output is fixed at
a voltage equal to 1/2 either supply voltage (for equal bipolar
supplies). Under this condition P_DL = V_S2/(4 • R_L) where R_L
includes feedback network loading.
Note that it is the power in the output stage and not into the
load that determines internal power dissipation.
As an absolute worst-case example, compute the maximum
T_J using an OPA4684IPW (TSSOP-14 package) in the circuit
of Figure 1 operating at the maximum specified ambient
temperature of +85°C with all channels driving a grounded
100Ω load to 2.5V_DC.
P_D = 10V • 7.8mA + 4 • (5² /(4 • (100Ω  1.6kΩ))) = 144mW
Maximum T_J = +85°C + (0.144W • 110°C/W) = 101°C.
This maximum operating junction temperature is well below
most system level targets. Most applications will be lower
than this since an absolute worst-case output stage power
was assumed in this calculation with all 4 channels running
maximum output power simultaneously.
OPA4684
21
SBOS240B
www.ti.com