CS5461A Datasheet, PDF (20/41 Pages) Cirrus Logic – Single Phase, Bi-directional Power/Energy IC

CS5461A
adding 2.737649x10^-4 to the Temperature Offset Regis-
ter (T_off). Therefore,
Toff = Toff + (∆T × 2.737649 ⋅ 10^–4 )
if T_off = -0.09104831 and ∆T = -7.0 (^oC), then
Toff = –0.09104831 + (–7.0 × 2.737649 ⋅ 10^–4 ) = –0.09296466
or 0xF419BC (2’s compliment notation) is stored in the
Temperature Offset Register (T_off).
To convert the Temperature Register (T) from a Celsius
scale (^oC) to a Fahrenheit scale (^oF) utilize the formula
o_F
=
9--
5
( ^oC
+
17.7778
)
Applying the above relationship to the CS5461A tem-
perature measurement algorithm
T 〈 ^oF〉
=
(
9--
5
×
Tg _{a i n} ) [ T
〈
o_C〉
+
(Toff
+
( 17.7778
×
2.737649
⋅
10^–4 ) )
]
If T_off = -0.09296466 and T_gain = 23.799 for a Celsius
scale, then the modified values are T_off = -0.08809772
(0xF4B937) and T_gain = 42.8382 (0x55AD29) for a
Fahrenheit scale.
5.7 Voltage Reference
The CS5461A is specified for operation with a +2.5 V
reference between the VREFIN and AGND pins. To uti-
lize the on-chip 2.5 V reference, connect the VREFOUT
pin to the VREFIN pin of the device. The VREFIN pin
can be used to connect external filtering and/or refer-
ences.
5.8 System Initialization
Upon powering up, the digital circuitry is held in reset
until the analog voltage reaches 4.0 V. At that time, an
eight-XIN-clock-period delay is enabled to allow the os-
cillator to stabilize. The CS5461A will then initialize.
A hardware reset is initiated when the RESET pin is as-
serted with a minimum pulse width of 50 ns. The
RESET signal is asynchronous, with a Schmitt-trigger
input. Once the RESET pin is de-asserted, an
eight-XIN-clock-period delay is enabled.
A software reset is initiated by writing the command of
0x80. After a hardware or software reset, the internal
registers (some of which drive output pins) will be reset
to their default values. Status bit DRDY in the Status
Register, indicates the CS5461A is in its active state
and ready to receive commands.
5.9 Power-down States
The CS5461A has two power-down states, stand-by
and sleep. In the stand-by state all circuitry except the
voltage reference and crystal oscillator is turned off. To
return the device to the active state a power-up com-
mand is sent to the device.
In sleep state all circuitry except the instruction decoder
is turned off. When the power-up command is sent to
the device, a system initialization is performed (see
Section 5.8 System Initialization on page 20).
5.10 Oscillator Characteristics
The XIN and XOUT pins are the input and output of an
inverting amplifier configured as an on-chip oscillator,
as shown in Figure 8. The oscillator circuit is designed
XOUT
C1
Oscillator
Circuit
XIN
DGND
C2
C1 = C2 = 22 pF
Figure 8. Oscillator Connection
to work with a quartz crystal. To reduce circuit cost, two
load capacitors C1 and C2 are integrated in the device,
from XIN to DGND, and XOUT to DGND. PCB trace
lengths should be minimized to reduce stray capaci-
tance. To drive the device from an external clock
source, XOUT should be left unconnected while XIN is
driven by the external circuitry. There is an amplifier be-
tween XIN and the digital section which provides
CMOS-level signals. This amplifier works with sinusoi-
dal inputs so there are no problems with slow edge
times.
The CS5461A can be driven by an external oscillator
ranging from 2.5 to 20 MHz, but the K divider value must
be set such that the internal MCLK will run somewhere
between 2.5 MHz and 5 MHz. The K divider value is set
with the K[3:0] bits in the Configuration Register. As an
example, if XIN = MCLK = 15 MHz, and K is set to 5,
then DCLK is 3 MHz, which is a valid value for DCLK.
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