DSD1608 Datasheet, PDF (2/41 Pages) Burr-Brown (TI) – 8-CHANNEL, ENHANCED MULTIFORMAT, DELTA-SIGMA, DIGITAL-TO-ANALOG CONVERTER

DSD1608
SLES040 – JUNE 2002
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate
precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to
damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
PRODUCT
PACKAGE
PACKAGE
DESIGNATOR
DSD1608PAH 52-lead TQFP
PAH
OPERATION
TEMPERATURE
RANGE
–25°C to 85°C
PACKAGE
MARKING
DSD1608
ORDERING
NUMBER
DSD1608PAH
DSD1608PAHR
TRANSPORT
MEDIA
Tube
Tape and reel
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
DSD1608
Supply voltage
VCC1–VCC7
VDD1, VDD2
Supply voltage differences: VCC1–VCC7, VDD1, VDD2
Ground voltage differences: AGND1–6, DGND1, DGND2
6.5 V
4V
±0.1 V
±0.1 V
Digital input voltage: PLRCK, PBCK, PDATA1–PDATA4, DSD1–DSD8, DBCK, DSCK, PSCK, RST
–0.3 V to 6.5 V
Digital input voltage: MC, MS, MDI, ZERO1, ZERO2, ZERO38, MDO
Analog input voltage
Input current (any pins except supplies)
–0.3 V to (VDD + 0.3 V)
–0.3 V to (VCC + 0.3 V)
±10 mA
Operating temperature
–40°C to 85°C
Storage temperature
–55°C to 150°C
Junction temperature
150°C
Lead temperature (soldering)
260°C, 5 s
Package temperature (IR reflow, peak)
235°C, 10 s
(1) _{Stressesbeyondthoselistedunder“absolutemaximumratings”maycausepermanentdamagetothedevice.Thesearestressratingsonly,and}
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
at TA = 25°C, VDD = 3.3 V, VCC = 5 V; in PCM mode, fS = 44.1 kHz, system clock = 256 fS, 24-bit data; in DSD mode, fS = 2.8224 MHz
(= 64 × 44.1 kHz), system clock = 256 × 44.1 kHz, 1-bit data (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
Resolution
24
Bits
DATA FORMAT (PCM MODE)
Audio data interface format
Standard, I2S, left justified
Audio data bit length
16-, 18-, 20-, 24-bit selectable
Audio data format
MSB first, 2s complement
fS
Sampling frequency
System clock frequency
DATA FORMAT (DSD MODE)
fS = 44.1 kHz
10
200 kHz
128 fS, 192 fS, 256 fS, 384 fS,
512 fS, 768 fS
Audio data interface format
Direct stream digital (DSD)
Audio data bit length
1 bit
fS
Sampling frequency
fS = 44.1 kHz
64 fS
Hz
System clock frequency
fS = 44.1 kHz
256 fS, 384 fS, 512 fS, 768 fS kHz
(1) _{Pins 50, 51, 34, 33, 37, 38–45, 46–49: PBCK, PLRCK, DSCK, PSCK, DBCK, DSD1–DSD8, PDATA1–PDATA4.}
(2) _{Pins 2, 3, 4, 36: MDI, MS, MC, RST.}
(3) _{Pins 5–8: MDO, ZERO1, ZERO2, ZERO38.}
(4) _{Analogperformance specs are measured in the averaging mode using the System Twot audio measurement system by Audio Precisiont.}
(5) _{Thesespecs are measured under the condition that the OVR1, OVR0 in mode registers are set to (0,1). (The oversampling rate of the modulator}
is 64 fS.) If the OVR1, OVR0 are (0,0) (32 fS oversampling: default), the specs are the same as at fS = 96 kHz.
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