buf06703 Datasheet, PDF (19/25 Pages) Burr-Brown (TI) – MULTI-CHANNEL LEC GAMMA CORRECTION BUFFER

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GENERAL POWERPAD DESIGN
CONSIDERATIONS
The BUF07703 is available in the thermally enhanced
PowerPAD family of packages. These packages are
constructed using a downset leadframe upon which the
die is mounted; see Figure 42(a) and (b). This
arrangement results in the lead frame being exposed as
a thermal pad on the underside of the package; see
Figure 42(c). Due to this thermal pad having direct
thermal contact with the die, excellent thermal
performance is achieved by providing a good thermal
path away from the thermal pad.
The PowerPAD package allows for both assembly and
thermal management in one manufacturing operation.
During the surface-mount solder operation (when the
leads are being soldered), the thermal pad can also be
soldered to a copper area underneath the package.
Through the use of thermal paths within this copper area,
heat can be conducted away from the package into either
a ground plane or other heat-dissipating device.
1. Prepare the PCB with a top-side etch pattern, (see
Pin Configurations). There must be etching for the
leads as well as etch for the thermal pad.
2. Place 18 holes in the area of the thermal pad. These
holes must be 13 mils in diameter. Keep them small,
so that solder wicking through the holes is not a
problem during reflow.
3. Additional vias may be placed anywhere along the
thermal plane outside of the thermal pad area. This
helps dissipate the heat generated by the
BUF07703 IC. These additional vias may be larger
than the 13-mil diameter vias directly under the
thermal pad. They can be larger because they are
not in the thermal pad area to be soldered, so that
wicking is not a problem.
4. Connect all holes to the internal ground plane.
5. When connecting these holes to the ground plane,
do not use the typical web or spoke via connection
methodology. Web connections have a high thermal
BUF07703
BUF06703
BUF05703
SBOS269A – MARCH 2003 – REVISED JUNE 2003
resistance connection that is useful for slowing the
heat transfer during soldering operations. This
makes the soldering of vias that have plane
connections easier. In this application, however, low
thermal resistance is desired for the most efficient
heat transfer. Therefore, the holes under the
BUF07703 PowerPAD package must make their
connection to the internal ground plane with a
complete connection around the entire
circumference of the plated-through hole.
6. The top-side solder mask must leave the terminals
of the package and the thermal pad area with its five
holes (dual) or nine holes (quad) exposed. The
bottom-side solder mask must cover the five or nine
holes of the thermal pad area. This prevents solder
from being pulled away from the thermal pad area
during the reflow process.
7. Apply solder paste to the exposed thermal pad area
and all of the IC terminals.
8. With these preparatory steps in place, the
BUF07703 IC is simply placed in position and run
through the solder reflow operation as any standard
surface-mount component. This results in a part that
is properly installed.
For a given θ_JA, the maximum power dissipation is
calculated by the following formula:
ǒ Ǔ P_D +
T_MAX * T_A
q_JA
Where:
P_D = maximum power dissipation (W)
T_MAX = absolute maximum junction temperature (150°C)
T_A = free-ambient air temperature (°C)
θ_JA = θ_JC + θ_CA
θ_JC = thermal coefficient from junction to case (°C/W)
θ_CA = thermal coefficient from case-to-ambient air (°C/W)
This lower thermal resistance enables the BUF07703 to
deliver maximum output currents even at high ambient
temperatures.
DIE
Side View (a)
Thermal
Pad
DIE
End View (b)
Bottom View (c)
NOTE A: The thermal pad is electrically isolated from all terminals in the package.
Figure 42. Views of Thermally Enhanced DGN Package
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