OPA3693 Datasheet, PDF (17/29 Pages) Burr-Brown (TI) – Triple, Ultra-Wideband, Fixed-Gain, VIDEO BUFFER with Disable

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While the circuit of Figure 45 shows +5V
single-supply operation, this same circuit may be
used for single supplies ranging as high as +12V
nominal. The noninverting input bias resistors are
relatively low in Figure 45 to minimize output dc
offset as a result of noninverting input bias current.
At higher signal-supply voltage, these resistors
should be increased to limit the added supply current
drawn through this path.
Figure 46 shows the AC-coupled, G = +1V/V,
single-supply specification and test circuit. In this
case, the gain setting resistor, R_G, is simply left open
to get a gain of +1V for ac signals. Once again, the
noninverting input is dc biased at midsupply, putting
that same V_S/2 at the output pin. The signal is
AC-coupled into this midpoint with an added
termination resistor on the source side of the
blocking capacitor.
V_S +5V
50W Source
1000pF
V_I
604W
60.4W 604W
0.1mF
6.8mF
1/3
OPA3693
R_F
300W
DIS
V_O ^100W
V_S/2
R_G
300W
Open
Figure 46. AC-Coupled, G = +1V/V, Single-Supply
Specification and Test Circuit
WIDEBAND UNITY-GAIN BUFFER WITH
IMPROVED FLATNESS
As shown in the Typical Characteristic curves, the
unity-gain buffer configuration of Figure 43 illustrates
a peaking in the frequency response exceeding 2dB.
This configuration gives the slight amount of
overshoot and ringing apparent in the gain of +1V/V
pulse response curves. A similar circuit that holds a
flatter frequency response, giving improved pulse
fidelity, is shown in Figure 47. This circuit removes
the peaking by bootstrapping out any parasitic
effects on R_G.
OPA3693
SBOS353 – DECEMBER 2006
The input impedance is still set by R_M as the
apparent impedance looking into R_G is very high. R_M
may be increased to show a higher input impedance,
but larger values begin to impact dc output offset
voltage.
+5V
1/3
OPA3693
DIS
R_O
V_O ^50W
R_G
RF
300W
300W
V_I
R_M
50W
-5V
Figure 47. Improved Unity-Gain Buffer
This circuit creates an additional input offset voltage
as the difference in the two input bias currents times
the impedance to ground at V_I. Figure 48 shows a
comparison of small-signal frequency response for
the unity-gain buffer of Figure 43 compared to the
improved approach shown in Figure 47.
2
1
0
-1
-2
-3
-4
-5
-6
10
G = +1, Figure 43
G = +1, Figure 47
100
Frequency (MHz)
1000
Figure 48. Buffer Frequency Response
Comparison
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