ADS808 Datasheet, PDF (16/19 Pages) Burr-Brown (TI) – 12-Bit, 70MHz Sampling ANALOG-TO-DIGITAL CONVERTER

If the analog inputs to the ADS808 are driven differentially, it
is especially important to optimize towards a highly symmetri-
cal layout. Small trace length differences may create phase
shifts compromising a good distortion performance. For this
reason, the use of two single op amps (rather than one dual
amplifier) enables a more symmetrical layout and a better
match of parasitic capacitances. The pin orientation of the
ADS808 package follows a “flow-through” design with the
analog inputs located on one side of the package while the
digital outputs are located on the opposite side of the quad-
flat package. This provides a good physical isolation be-
tween the analog and digital connections. While designing
the layout, it is important to keep the analog signal traces
separated from any digital lines to prevent noise coupling
onto the analog portion.
Also, try to match trace length for the differential clock signal
(if used) to avoid mismatches in propagation delays. Single-
ended clock lines must be short and should not cross any
other signal traces.
Short-circuit traces on the digital outputs will minimize ca-
pacitive loading. Trace length should be kept short to the
receiving gate (< 2") with only one CMOS gate connected to
one digital output. If possible, the digital data outputs should
be buffered (with a 74LCX571, for example). Dynamic perfor-
mance may also be improved with the insertion of series
resistors at each data output line. This sets a defined time
constant and reduces the slew rate that would otherwise
flow, due to the fast edge rate. The resistor value may be
chosen to result in a time constant of 15% to 25% of the used
data rate.
LAYOUT OF PCB WITH
PowerPAD THERMALLY
ENHANCED PACKAGES
The ADS808 is housed in a 48-lead PowerPAD thermally
enhanced package. To make optimum use of the thermal
efficiencies designed into the PowerPAD package, the PCB
must be designed with this technology in mind. Please refer
to SLMA004 PowerPAD brief “PowerPAD Made Easy” on
our web site at www.ti.com, which addresses the specific
considerations required when integrating a PowerPAD pack-
age into the PCB design. For more detailed information,
including thermal modeling and repair procedures, please
see SLMA002 technical brief “PowerPAD Thermally En-
hanced Package” (www.ti.com).
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ADS808
www.ti.com
SBAS179C