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OPA689 Datasheet, PDF (15/16 Pages) Burr-Brown (TI) – Wideband, High Gain VOLTAGE LIMITING AMPLIFIER
OFFSET VOLTAGE ADJUSTMENT
The circuit in Figure 9 allows offset adjustment without
degrading offset drift with temperature. Use this circuit with
caution since power supply noise can inadvertently couple
into the op amp.
Remember that additional offset errors can be created by the
amplifier’s input bias currents. Whenever possible, match
the resistance seen by both DC Input Bias Currents by using
R3. This minimizes the output offset voltage caused by the
Input Bias Currents.
+VS
RTRIM
47kΩ
–VS
0.1µF R1
R2
OPA689
VO
R3 = R1 || R2
VIN or Ground
NOTES: (1) R3 is optional and minimizes
output offset due to input bias currents. (2) Set
R1 << RTRIM.
FIGURE 9. Offset Voltage Trim.
OUTPUT DRIVE
The OPA689 has been optimized to drive 500Ω loads, such
as A/D converters. It still performs very well driving 100Ω
loads. This makes the OPA689 an ideal choice for a wide
range of high frequency applications.
Many high speed applications, such as driving A/D convert-
ers, require op amps with low output impedance. As shown
in the Output Impedance vs Frequency performance curve,
the OPA689 maintains very low closed-loop output imped-
ance over frequency. Closed-loop output impedance in-
creases with frequency since loop gain decreases with fre-
quency.
THERMAL CONSIDERATIONS
The OPA689 will not require heat-sinking under most oper-
ating conditions. Maximum desired junction temperature
will set a maximum allowed internal power dissipation as
described below. In no case should the maximum junction
temperature be allowed to exceed 175°C.
The total internal power dissipation (PD) is the sum of
quiescent power (PDQ) and the additional power dissipated
in the output stage (PDL) while delivering load power. PDQ
is simply the specified no-load supply current times the total
supply voltage across the part. PDL depends on the required
output signals and loads. For a grounded resistive load,
and equal bipolar supplies, it is at a maximum when the
output is at 1/2 either supply voltage. In this condition,
PDL = VS2/(4RL) where RL includes the feedback network
loading. Note that it is the power in the output stage, and not
in the load, that determines internal power dissipation.
The operating junction temperature is: TJ = TA + PD θJA,
where TA is the ambient temperature.
For example, the maximum TJ for a OPA689U with G = +6,
RFB = 750Ω, RL = 100Ω, and ±VS = ±5V at the maximum
TA = +85°C is calculated this way:
PDQ = (10V • 20mA) = 200mW
P DL
=
(5V)2
4 • (100Ω || 850Ω)
PD = 200mW + 70mW = 270mW
TJ = 85° C + 270mW •125° C/ W = 119° C
CAPACITIVE LOADS
Capacitive loads, such as flash A/D converters, will decrease
the amplifier’s phase margin, which may cause peaking or
oscillations. Capacitive loads ≥ 1pF should be isolated by
connecting a small resistor in series with the output as shown
in Figure 10. Increasing the gain from +6 will improve the
capacitive drive capabilities due to increased phase margin.
RISO
OPA689
VO
RL is optional
RL
CL
FIGURE 10. Driving Capacitive Loads.
In general, capacitive loads should be minimized for opti-
mum high frequency performance. The capacitance of coax
cable (29pF/foot for RG-58) will not load the amplifier
when the coaxial cable, or transmission line, is terminated in
its characteristic impedance.
®
15
OPA689