DSD1702 Datasheet, PDF (10/28 Pages) Burr-Brown (TI) – ENHANCED MULTIFORMAT, DELTA-SIGMA, AUDIO DIGITAL-TO-ANALOG CONVERTER

DSD1702
SLES005A – JUNE 2001 – REVISED FEBRUARY 2002
system clock and reset functions (continued)
tBCY
tBCH
tBCL
tBL
tLB
tDS
tDH
BCK pulse cycle time
BCK high level time
BCK low level time
BCK rising edge to LRCK edge
LRCK falling edge to BCK
Rising edge DIN set up time
DIN hold time
PARAMETERS
PLRCK
PBCK
PDATA
tBCH
tBCL
tLB
tBCY
tBL
tDS
tDH
Figure 5. Timing for PCM Audio Interface
PARAMETERS
tBCY BCK pulse cycle time
tBCH BCK high level time
tBCL BCK low level time
tDS DIN set up time
tDH DIN hold time
† _{2.8224 MHz = 64 x 44.1 kHz, This value is specified as a sampling rate of DSD.}
DBCK
tBCH
tBCL
tBCY
tBL
DSDL
DSDR
tDS
tDH
Figure 6. Timing for DSD Audio Interface
MIN MAX UNIT
70
ns
30
ns
30
ns
10
ns
10
ns
10
ns
10
ns
50% of VDD
50% of VDD
50% of VDD
MIN MAX
2.8224^†
30
30
10
10
UNIT
MHz
ns
ns
ns
ns
50% of VDD
50% of VDD
10
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