DAC7731 Datasheet, PDF (10/19 Pages) Burr-Brown (TI) – 16-Bit, Voltage Output, Serial Input DIGITAL-TO-ANALOG CONVERTER

THEORY OF OPERATION
The DAC7731 is a voltage output, 16-bit DAC with a +10V
built-in internal reference. The architecture is an R-2R ladder
configuration with the three MSB’s segmented, followed by
an operational amplifier that serves as a buffer, as shown in
Figure 1. The output buffer is designed to allow user-
configurable output adjustments giving the DAC7731 output
voltage ranges of 0V to +10V, –5V to +5V, or –10V to +10V.
Please refer to Figures 2, 3, and 4 for pin configuration
information.
The digital input is a serial word made up of the DAC code
(MSB first) and is loaded into the DAC register using the
LDAC input pin. The converter can be powered from ±12V
to ±15V dual analog supplies and a +5V logic supply. The
device offers a reset function, which immediately sets the
DAC output voltage and DAC register to min-scale (code
0000_H) or mid-scale (code 8000_H). The data I/O and reset
functions are discussed in more detail in the following sec-
tions.
REF_ADJ REF_OUT REF_IN
V_REF
Buffer
R/4
+10V Internal
Reference
R
R/2 R/2 R/4
2R 2R
2R
2R
2R
2R
2R
2R
2R
R/4
V_REF
AGND
FIGURE 1. DAC7731 Architecture.
R_OFFSET
RFB2
RFB1
SJ
V_OUT
V_CC
0.1µF 1µF
DAC7731
1 V_CC
2 REF_OUT
3 REF_IN
4 REFADJ
V_SS 24
REFEN 23
RSTSEL 22
SCLK 21
5 V_REF
6 R_OFFSET
7 AGND
CS 20
SDO 19
SDI 18
8 RFB2
LDAC 17
9 RFB1
RST 16
10 SJ
NC 15
11 V_OUT
(0V to +10V)
V_DD
12 V_DD
TEST 14
DGND 13
0.1µF
1µF
V_SS
1µF 0.1µF
Control/Data
Bus
V_CC
0.1µF 1µF
(–5V to +5V)
V_DD
0.1µF
1µF
DAC7731
1 V_CC
2 REF_OUT
3 REF_IN
4 REFADJ
5 V_REF
6 R_OFFSET
7 AGND
8 RFB2
9 RFB1
10 SJ
11 V_OUT
12 V_DD
V_SS 24
REFEN 23
RSTSEL 22
SCLK 21
CS 20
SDO 19
SDI 18
LDAC 17
RST 16
NC 15
TEST 14
DGND 13
V_SS
1µF 0.1µF
Control/Data
Bus
FIGURE 2. Basic Operation: V_OUT = 0V to +10V.
FIGURE 3. Basic Operation: V_OUT = –5V to +5V.
10
DAC7731
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