CS61880 Datasheet, PDF (1/70 Pages) Cirrus Logic – OCTAL E1 LINE INTERFACE UNIT

CS61880
Octal E1 Line Interface Unit
Features
Description
Octal E1 Short-haul Line Interface Unit
Low Power
No External Component Changes for 120 Ω / 75 Ω
Operation
Pulse Shapes can be customized by the user
Internal AMI, or HDB3 Encoding/Decoding
LOS Detection per ITU G.775 or ETSI 300- 233
G.772 Non-Intrusive Monitoring
G.703 BITS Clock Recovery
Crystal-less Jitter Attenuation
Serial/Parallel Microprocessor Control Interfaces
Transmitter Short Circuit Current Limiter (<50 mA)
TX Drivers with Fast High-Z and Power Down
JTAG Boundary Scan compliant to IEEE 1149.1
144-Pin LQFP or 160-Pin FBGA Package
ORDERING INFORMATION
CS61880-IQ
CS61880-IB
144-pin LQFP
160-pin FBGA
The CS61880 is a full-featured Octal E1 short-haul LIU
that supports 2.048 Mbps data transmission for both E1
75 Ω and E1 120 Ω applications. Each channel provides
crystal-less jitter attenuation that complies with the most
stringent standards. Each channel also provides internal
AMI/HDB3 encoding/decoding. To support enhanced
system diagnostics, channel zero can be configured for
G.772 non-intrusive monitoring of any of the other 7
channels’ receive or transmit paths.
The CS61880 makes use of ultra low power matched im-
pedance transmitters and receivers to reduce power
beyond that achieved by traditional driver designs. By
achieving a more precise line match, this technique also
provides superior return loss characteristics. Additional-
ly, the internal line matching circuitry reduces the
external component count. All transmitters have controls
for independent power down and High-Z.
Each receiver provides reliable data recovery with over
12 dB of cable attenuation. The receiver also incorpo-
rates LOS detection compliant to the most recent
specifications.
LOS
RCLK
RPOS
RNEG
TCLK
TPOS
TNEG
JTAG
Serial
Port
0
1
7
Jitter
Attenuator
LOS
Clock
Recovery
Receiver
Data
Recovery
Transmit
Control
Pulse
Shaper
Driver
JTAG Interface
Host Interface
RTIP
RRING
TTIP
TRING
Host
Serial/Parallel
Port
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
http://www.cirrus.com
 Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
JUL ‘03
DS450PP3
1