AFEDRI8201 Datasheet, PDF (1/22 Pages) Burr-Brown (TI) – IF ADC Front End for AM/FM and HD Radios

AFEDRI8201
SBWS017F − SEPTEMBER 2003 − REVISED AUGUST 2005
IF ADC Front End for AM/FM and HD Radios
FEATURES
D Interfaces To Texas Instruments DRIx50 HD
Radio Baseband Processors
D 12-Bit, 80MSPS ADC Reduces Noise and
Improves Sensitivity
D Typical SNR of 102dB in 3kHz Bandwidth
D Programmable Input Range For Optimum
Tuner Dynamic Range
D Integrated Digital Downconverter (DDC)
− Quadrature Mixer, NCO, CIC Decimation
Filter, And FIR Filters
D Mixer: 32-Bit Frequency and Phase
D Decimation Ratio: 32 to 4096
D User-Programmable FIR Filters with 16-Bit
Coefficients
D 12-Bit Auxiliary DAC
D Code Composer Module for Easy Software
Generation
D SPI Control Interface
APPLICATIONS
D AM/FM and HD Radio Receivers
D IF Receive Channels
D Software Radios
D Narrowband Receivers
DESCRIPTION
The AFEDRI8201 implements the receive channel analog
functions required for intermediate-frequency (IF)
sampled AM/FM and HD digital radio receivers. It is
designed to be used with TI’s DRIx50 digital baseband
processor. The AFEDRI8201 is programmed by the
DRIx50 for use in AM/FM and HD radio. The AFEDRI8201
oversamples the radio tuner IF output at speeds of up to
80MHz to reduce noise and improve dynamic range. The
radio tuner output IF is typically 10.7MHz for AM or FM as
well as 450kHz or 455kHz for AM, as desired. The
AFEDRI8201 then mixes, filters, and decimates the signal
to provide baseband I and Q output signals to the digital
baseband processor. The AFEDRI8201 also includes a
general-purpose 12-bit control digital-to-analog converter
(DAC) to provide a gain control signal or other analog
feedback to the tuner.
The DRIx50 digital baseband device writes control register
data as well as decimation filter coefficients to the
AFEDRI8201 through the industry-standard SPI control
interface. The baseband output signals are transported to
the DRIx50 through a general-purpose, high-speed serial
interface (TI’s Buffered Serial Ports, McBSP).
This unit uses 3.3V analog and 1.8V digital power
supplies. Typical power dissipation is 490mW. The digital
I/O lines can be powered by a 3.3V supply.
IFP
IFM
12−Bit
Pipeline
ADC
Quadrature
Mixer
CIC Filter
N
FIR Filter 1
2
NCO
AUX
Auxiliary
DAC
Voltage
Reference
Clock
Interface
Timing
Generator
FIR Filter 2A
2
FIR Filter 2B
2
SPI Control
Interface
DOUT0
DOUT1
DFSO
DCLK
DIN
DFSI
REFM VCM REFP VGB MCLK MCLKB PWD SYNC RESET SCK MOSI MISO CS
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semiconductor products and disclaimers thereto appears at the end of this data sheet.
SPI is a trademark of Motorola, Inc. All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright  2003−2005, Texas Instruments Incorporated
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