AFE2126 Datasheet, PDF (1/11 Pages) Burr-Brown (TI) – Dual HDSL/SDSL ANALOG FRONT END

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AFE2126
AFE2126
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information, visit www.burr-brown.com
Dual HDSL /SDSL ANALOG FRONT END
FEATURES
q SERIAL DIGITAL INTERFACE
q 48-LEAD SSOP PACKAGE
q E1, T1 AND SDSL OPERATION
q 64kbps TO 1168kbps OPERATION
q SCALEABLE DATA RATE
q 280mW POWER DISSIPATION PER
CHANNEL
q TWO COMPLETE HDSL ANALOG INTER-
FACES
q +5V POWER (5V or 3.3V Digital)
q WIDE Rx GAIN RANGE: 0dB TO 18dB
DESCRIPTION
Burr-Brown’s dual Analog Front End chip greatly re-
duces the size and cost of a DSL (Digital Subscriber
Line) system by providing all of the active analog
circuitry needed to connect two digital signal processors
to external compromise hybrids and line transformers.
The AFE2126 is optimized for HDSL (High bit rate
DSL) and for SDSL (symmetrical DSL) applications.
The AFE2126 is particularly suitable for multiple rate
DSL systems because the transmit and receive filter
responses automatically change with clock frequency.
The device operates over a wide range of data rates from
64kbps to 1168kbps.
Functionally, each half of this unit consists of a transmit
and a receive section. The transmit section generates
analog signals from 2-bit digital symbol data, and filters
the analog signals to create 2B1Q symbols. The on-
board differential line driver provides a 13.5dBm signal
to the telephone line. The receive section filters and
digitizes the symbol data received on the telephone line.
This IC operates on a single 5V supply. The digital
circuitry in the unit can be connected to a supply from
3.3V to 5V. It is housed in a 48-lead SSOP package.
tx and rx
Interface
Lines
Pulse Former
tx and rx
Control
Registers
Decimation
Filter
1/2 of AFE2126
∆Σ
Modulator
Line Driver
txLINE+
txLINE–
Difference
Amplifier
rxHYB+
rxHYB–
Programmable
Gain Amp
rxLINE+
rxLINE–
Patents Pending
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©_{1999 Burr-Brown Corporation}
PDS-11561A
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PriAnteFd iEn U2.S1.A2. D6ecember, 1999