AFE1205 Datasheet, PDF (1/10 Pages) Burr-Brown (TI) – 2Mbps, Single Pair HDSL ANALOG FRONT END

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AFE1205
AFE1205
2Mbps, Single Pair HDSL ANALOG FRONT END
FEATURES
q E1/T1 SINGLE PAIR 2B1Q OPERATION
q COMPLETE ANALOG INTERFACE
q 385mW POWER DISSIPATION
q PROGRAMMABLE POWER
DESCRIPTION
Burr-Brown’s Analog Front End greatly reduces the size and
cost of a single pair HDSL (High bit rate Digital Subscriber
Line) system by providing all of the active analog circuitry
needed to connect an HDSL digital signal processor to an
external compromise hybrid and an HDSL line transformer.
The transmit and receive filter responses automatically change
with clock frequency, allowing the AFE1205 to operate over a
wide range of data rates. The power dissipation of the device
can be reduced under digital control for operation at lower
speeds. The AFE1205 will operate at bit rates from 160kbps to
2.3Mbps. It meets ETSI PSD specifications for single pair E1,
as well as ETSI and ANSI PSD specifications for two pair E1
and T1.
Functionally, this unit consists of a transmit and a receive
section. The transmit section generates, filters, and buffers
outgoing 2B1Q data. The receive section filters and digitizes
the symbol data received on the telephone line. This IC operates
q 48-LEAD SSOP PACKAGE
q SCALEABLE DATA RATE
q OPERATION FROM 2.3Mbps TO 160kbps
q +5V ONLY (5V OR 3.3V DIGITAL)
q –40°C TO +85°C OPERATION
on a single 5V supply. The digital circuitry in the unit can be
connected to a supply from 3.3V to 5V. The chip uses only
385mW for full-speed operation. It is housed in a small 48-lead
SSOP package.
The receive channel is designed around a fourth-order delta-
sigma analog-to-digital converter. It includes a difference am-
plifier designed to be used with an external compromise hybrid
for first-order analog echo cancellation. A programmable gain
amplifier with gains 0dB to +9dB is also included. The delta-
sigma modulator, operating at a 24X oversampling ratio, pro-
duces a 14-bit output at symbol rates up to 1168kHz (for
2.3Mbps operation).
The transmit channel consists of a digital-to-analog converter and
switched-capacitor pulse forming network followed by a differ-
ential line driver. The pulse forming network receives symbol
data and generates a standard 2B1Q output waveform. The
differential line driver uses a composite output stage combining
class B operation (for high efficiency driving large signals) with
class AB operation (to minimize crossover distortion).
PLL_OUT
PLL_IN
txDAT
txCLK
rxSYNC
rxLOOP
2
rxGAIN
14
rxD13 - rxD0
D/A
Converter
Pulse
Former
Line
Driver
Transmit
Control
Voltage
Reference
txLINE_P
txLINE_N
REF_P
V_CM
REF_N
Receive
Control
Decimation
Filter
Delta-Sigma
Modulator
rxLINE_P
rxLINE_N
rxHYB_P
rxHYB_N
Patents Pending
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©_{1998 Burr-Brown Corporation}
PDS-1461A
Printed in U.S.A. September, 1998