ADS5271 Datasheet, PDF (1/19 Pages) Burr-Brown (TI) – 8-Channel, 12-Bit, 50MSPS ADC with Serial LVDS Interface

ADS5271
SBAS313A − JUNE 2004 − REVISED JUNE 2004
8-Channel, 12-Bit, 50MSPS ADC
with Serial LVDS Interface
FEATURES
D Maximum Sample Rate: 50MSPS
D 12-Bit Resolution
D No Missing Codes
D Power Dissipation: 957mW
D CMOS Technology
D Simultaneous Sample-and-Hold
D 70.5dB SNR at 10MHz IF
D Internal and External References
D 3.3V Digital/Analog Supply
D Serialized LVDS Outputs
D Integrated Frame and Synch Patterns
D MSB and LSB First Modes
D Option to Double LVDS Clock Output Currents
D Pin- and Format-Compatible Family
D TQFP-80 PowerPAD Package
APPLICATIONS
D Portable Ultrasound Systems
D Tape Drives
D Test Equipment
D Optical Networking
DESCRIPTION
The ADS5271 is a high-performance, 50MSPS, 8-channel,
parallel analog-to-digital converter (ADC). Internal references
are provided, simplifying system design requirements. Low
power consumption allows for the highest of system
integration densities. Serial LVDS (low-voltage differential
signaling) outputs reduce the number of interface lines and
package size.
An integrated phase lock loop multiplies the incoming ADC
sampling clock by a factor of 12. This 12x clock is used in the
process of serializing the data output from each channel. The
12x clock is also used to generate a 1x and a 6x clock, both
of which are transmitted as LVDS clock outputs. The 6x clock
is denoted by the differential pair LCLKP and LCLKN, while the
1x clock is denoted by ADCLKP and ADCLKN. The word
output of each ADC channel can be transmitted either as MSB
or LSB first. The bit coinciding with the rising edge of the 1x
clock output is the first bit of the word. Data is to be latched by
the receiver on both the rising and falling edges of the 6x clock.
The ADS5271 provides internal references, or can optionally
be driven with external references. Best performance can be
achieved through the internal reference mode.
The device is available in a PowerPAD TQFP-80 package and
is specified over a −40°C to +85°C operating range.
6X ADCLK
ADCLK
PLL
1X ADCLK
IN1_P
S/H
IN1_N
IN2_P
S/H
IN2_N
IN3_P
S/H
IN3_N
IN4_P
S/H
IN4_N
IN5_P
S/H
IN5_N
IN6_P
S/H
IN6_N
IN7_P
S/H
IN7_N
IN8_P
S/H
IN8_N
12−Bit
ADC
12−Bit
ADC
12−Bit
ADC
12−Bit
ADC
12−Bit
ADC
12−Bit
ADC
12−Bit
ADC
12−Bit
ADC
Serializer
Serializer
Serializer
Serializer
Serializer
Serializer
Serializer
Serializer
Reference
Registers
Control
INT/EXT
LCLK_P
LCLK_N
ADCLK_P
ADCLK_N
OUT1_P
OUT1_N
OUT2_P
OUT2_N
OUT3_P
OUT3_N
OUT4_P
OUT4_N
OUT5_P
OUT5_N
OUT6_P
OUT6_N
OUT7_P
OUT7_N
OUT8_P
OUT8_N
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright  2004, Texas Instruments Incorporated
www.ti.com