BS616LV2023 Datasheet, PDF (5/11 Pages) Brilliance Semiconductor – Very Low Power/Voltage CMOS SRAM 128K x 16 or 256K x 8 bit switchable

BSI
„ DATA RETENTION CHARACTERISTICS ( TA = 0 to + 70^oC )
SYMBOL
PARAMETER
TEST CONDITIONS
V_DR
Vcc for Data Retention
CE1 Њ Vcc - 0.2V or CE2 Љ 0.2V or
V_IN Њ Vcc - 0.2V or V_IN Љ 0.2V
I_CCDR
Data Retention Current
CE1 Њ Vcc - 0.2V or CE2 Љ 0.2V
V_IN Њ Vcc - 0.2V or V_IN Љ 0.2V
t_CDR
Chip Deselect to Data
Retention Time
See Retention Waveform
t_R
Operation Recovery Time
1. Vcc = 1.5V, T_A = + 25^OC
2. t_RC = Read Cycle Time
BS616LV2023
MIN. TYP. ⁽¹⁾ MAX.
1.5
--
--
UNITS
V
--
0.05
0.5
uA
0
--
--
ns
T_RC ⁽²⁾
--
--
ns
„ LOW V_CC DATA RETENTION WAVEFORM (1) ( CE1 Controlled )
Vcc
CE1
Vcc
t CDR
VIH
Data Retention Mode
VDR Њ 1.5V
CE1 Њ Vcc - 0.2V
Vcc
tR
VIH
„ LOW V_CC DATA RETENTION WAVEFORM (1) ( CE2 Controlled )
Vcc
CE2
Vcc
t CDR
VIL
Data Retention Mode
VDR Њ 1.5V
CE2 Љ 0.2V
Vcc
tR
VIL
R0201-BS616LV2023
5
Revision 2.4
April 2002