BS616LV2016_06 Datasheet, PDF (5/11 Pages) Brilliance Semiconductor – Very Low Power CMOS SRAM 128K X 16 bit

n AC ELECTRICAL CHARACTERISTICS (T_A = -40^OC to +85^OC)
READ CYCLE
BS616LV2016
JEDEC
PARAMETER
NAME
PARANETER
NAME
tAVAX
tAVQX
tELQV
tBLQV
tGLQV
tELQX
tBLQX
tGLQX
tEHQZ
tBHQZ
tGHQZ
tAVQX
tRC
tAA
tACS
tBA
tOE
tCLZ
tBE
tOLZ
tCHZ
tBDO
tOHZ
tOH
DESCRIPTION
CYCLE TIME : 55ns CYCLE TIME : 70ns
(VCC=3.0~5.5V)
(VCC=2.7~5.5V)
MIN. TYP. MAX. MIN. TYP. MAX.
Read Cycle Time
55
--
--
70
--
--
Address Access Time
--
--
55
--
--
70
Chip Select Access Time
(CE) --
--
55
--
--
70
Data Byte Control Access Time (LB, UB) --
--
55
--
--
70
Output Enable to Output Valid
--
--
30
--
--
35
Chip Select to Output Low Z
(CE) 10
--
--
10
--
--
Data Byte Control to Output Low Z (LB, UB) 10
--
--
10
--
--
Output Enable to Output Low Z
5
--
--
5
--
--
Chip Select to Output High Z
(CE) --
--
30
--
--
35
Data Byte Control to Output High Z (LB, UB) --
--
30
--
--
35
Output Enable to Output High Z
--
--
25
--
--
30
Data Hold from Address Change
10
--
--
10
--
--
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
n SWITCHING WAVEFORMS (READ CYCLE)
READ CYCLE 1 ^(1,2,4)
ADDRESS
D_OUT
t_RC
t_AA
t_OH
t_OH
R0201-BS616LV2016
5
Revision 1.4
Nov.
2006