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BS616LV2016_08 Datasheet, PDF (2/11 Pages) Brilliance Semiconductor – Very Low Power CMOS SRAM 128K X 16 bit
„ PIN DESCRIPTIONS
BS616LV2016
Name
A0-A16 Address Input
Function
These 17 address inputs select one of the 131,072 x 16-bit in the RAM
CE Chip Enable Input
WE Write Enable Input
OE Output Enable Input
LB and UB Data Byte Control Input
CE is active LOW. Chip enable must be active when data read form or write to the
device. If chip enable is not active, the device is deselected and is in standby power
mode. The DQ pins will be in the high impedance state when the device is deselected.
The write enable input is active LOW and controls read and write operations. With the
chip selected, when WE is HIGH and OE is LOW, output data will be present on the
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the
selected memory location.
The output enable input is active LOW. If the output enable is active while the chip is
selected and the write enable is inactive, data will be present on the DQ pins and they
will be enabled. The DQ pins will be in the high impendence state when OE is inactive.
Lower byte and upper byte data input/output control pins.
DQ0-DQ15 Data Input/Output
Ports
VCC
There 16 bi-directional ports are used to read data from or write data into the RAM.
Power Supply
VSS
Ground
„ TRUTH TABLE
MODE
CE
WE
OE
LB
UB IO0~IO7 IO8~IO15 VCC CURRENT
Chip De-selected
H
X
X
X
X
High Z
High Z
(Power Down)
X
X
X
H
H
High Z
High Z
ICCSB, ICCSB1
ICCSB, ICCSB1
L
H
H
L
X
High Z
High Z
ICC
Output Disabled
L
H
H
X
L
High Z
High Z
ICC
L
L
DOUT
DOUT
ICC
Read
L
H
L
H
L
High Z
DOUT
ICC
L
H
DOUT
High Z
ICC
L
L
DIN
DIN
ICC
Write
L
L
X
H
L
X
DIN
ICC
L
H
DIN
X
ICC
NOTES: H means VIH; L means VIL; X means don’t care (Must be VIH or VIL state)
R0201-BS616LV2016
2
Revision 1.5
Oct.
2008