BS62LV4001 Datasheet, PDF (1/11 Pages) Brilliance Semiconductor – Low Power/Voltage CMOS SRAM 512K X 8 bit

BSI Low Power/Voltage CMOS SRAM
512K X 8 bit
BS62LV4001
„ FEATURES
• Wide Vcc operation voltage : 2.4V ~ 5.5V
• Low power consumption
Vcc = 3.0V C-grade: 20mA (Max.) operating current
I -grade: 25mA (Max.) operating current
0.25uA (Typ.) CMOS standby current
Vcc = 5.0V C-grade: 45mA (Max.) operation current
I -grade: 50mA (Max.) operating current
1.5uA (Typ.) CMOS standby current
• High speed access time :
-70
70ns (Max.) at Vcc = 3.0V
-10 100ns (Max.) at Vcc = 3.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE and OE options
„ GENERAL DESCRIPTION
The BS62LV4001 is a high performance, low power CMOS
Static Random Access Memory organized as 524,288 words by 8 bits
and operates from a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with maximum access time of 70/ 100ns
in 3.0V operation.
Easy memory expansion is provided by an active LOW chip
enable (CE), and active LOW output enable (OE) and three-state
output drivers.
The BS62LV4001 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62LV4001 is available in DICE form, JEDEC standard 32 pin
SOP, 32 pin TSOPII, 32 pin TSOP and 32 pin Small SOP.
„ PRODUCT FAMILY
„ PIN CONFIGURATIONS
„ FUNCTIONAL BLOCK DIAGRAM
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
1
32
2
31
3
30
4
29
5
28
6
27
7
26
8 BS62LV4001SC 25
9 ^BS62LV4001SI 24
10 ^BS62LV4001EC
BS62LV4001EI
23
11 _BS62LV4001PC 22
12 _BS62LV4001PI 21
13
20
14
19
15
18
16
17
VCC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
A11 1
A9 2
A8 3
A13 4
WE 5
A17 6
A15 7
VCC 8
A18 9
A16 10
A14 11
A12 12
A7 13
A6 14
A5 15
A4 16
BS62LV4001TC
BS62LV4001STC
BS62LV4001TI
BS62LV4001STI
32 OE
31 A10
30 CE
29 DQ7
28 DQ6
27 DQ5
26 DQ4
25 DQ3
24 GND
23 DQ2
22 DQ1
21 DQ0
20 A0
19 A1
18 A2
17 A3
A13
A17
A15
A18
A16
A14
A12
A7
A6
A5
A4
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CE
WE
OE
Vdd
Gnd
Address
22
Input
Row
2048
Buffer
Decoder
Memory Array
2048 X 2048
8
8
Control
Data
Input
Buffer
Data
Output
Buffer
2048
8
Column I/O
Write Driver
Sense Amp
8
256
Column Decoder
16
Address Input Buffer
A11 A9 A8 A3 A2 A1 A0 A10
Brilliance Semiconductor Inc. reserves the right to modify document contents without notice.
R0201-BS62LV4001
1
Revision 2.5
April 2002