BS616LV8016_06 Datasheet, PDF (1/10 Pages) Brilliance Semiconductor – Very Low Power CMOS SRAM 512K X 16 bit

Very Low Power CMOS SRAM
512K X 16 bit
Pb-Free and Green package materials are compliant to RoHS
BS616LV8016
n FEATURES
Ÿ Wide VCC operation voltage : 2.4V ~ 5.5V
Ÿ Very low power consumption :
VCC = 3.0V Operation current : 31mA (Max.) at 55ns
2mA (Max.) at 1MHz
Standby current : 0.8uA (Typ.) at 25 ^OC
VCC = 5.0V Operation current : 76mA (Max.) at 55ns
10mA (Max.) at 1MHz
Standby current : 3.5uA (Typ.) at 25^OC
Ÿ High speed access time :
-55
55ns(Max.) at VCC=3.0~5.5V
-70
70ns(Max.) at VCC=2.7~5.5V
Ÿ Automatic power down when chip is deselected
Ÿ Easy expansion with CE2, CE1 and OE options
Ÿ I/O Configuration x8/x16 selectable by LB and UB pin.
Ÿ Three state outputs and TTL compatible
Ÿ Fully static operation, no clock, no refresh
Ÿ Data retention supply voltage as low as 1.5V
n DESCRIPTION
The BS616LV8016 is a high performance, very low power CMOS
Static Random Access Memory organized as 524,288 by 16 bits and
operates form a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with typical CMOS standby
current of 0.8uA at 3.0V/25^OC and maximum access time of 55ns at
3.0V/85^OC.
Easy memory expansion is provided by an active LOW chip enable
(CE1), active HIGH chip enable (CE2) and active LOW output
enable (OE) and three-state output drivers.
The BS616LV8016 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The BS616LV8016 is available in DICE form and 48-ball BGA
package.
n POWER CONSUMPTION
PRODUCT
FAMILY
OPERATING
TEMPERATURE
STANDBY
(ICCSB1, Max)
VCC=5.0V VCC=3.0V
BS616LV8016DC _Commercial
BS616LV8016FC ^{+0OC to +70OC}
25uA
4.0uA
POWER DISSIPATION
1MHz
VCC=5.0V
10MHz
Operating
(ICC, Max)
fMax.
1MHz
VCC=3.0V
10MHz
9mA 39mA 75mA 1.5mA 19mA
fMax.
30mA
PKG TYPE
DICE
BGA-48-0912
BS616LV8016FI
Industrial
-40^OC to +85^OC
50uA
8.0uA 10mA 40mA 76mA
2mA
20mA 31mA BGA-48-0912
n PIN CONFIGURATIONS
1
2
3
4
5
6
A
LB
OE
A0
A1
A2 CE2
B
DQ8 UB
A3
A4 CE1 DQ0
C
DQ9 DQ10 A5
A6 DQ1 DQ2
D
VSS DQ11 A17 A7 DQ3 VCC
E
VCC DQ12 VSS A16 DQ4 VSS
F
DQ14 DQ13 A14 A15 DQ5 DQ6
G DQ15 NC A12 A13 WE DQ7
H
A18 A8
A9 A10 A11 NC
48-ball BGA top view
n BLOCK DIAGRAM
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
DQ0
.
.
.
.
.
.
DQ15
CE2
CE1
WE
OE
UB
LB
VCC
VSS
Address
10
Input
Buffer
Row
Decoder
1024
Memory Array
1024 x 8192
.
16
.
.
.
16
.
.
Control
Data
Input
Buffer
Data
Output
Buffer
16
16
8192
Column I/O
Write Driver
Sense Amp
512
Column Decoder
9
Address Input Buffer
A14 A15 A16 A17 A18 A0 A1 A2 A3
Brilliance Semiconductor, Inc. reserves the right to change products and specifications without notice.
R0201-BS616LV8016
1
Revision 2.3
May.
2006