BS616LV4015 Datasheet, PDF (1/10 Pages) Brilliance Semiconductor – Very Low Power/Voltage CMOS SRAM 256K X 16 bit

BSI ^{Very Low Power/Voltage CMOS SRAM}
256K X 16 bit
BS616LV4015
„ FEATURES
„ DESCRIPTION
• Operation voltage : 4.5 ~ 5.5V
• Low power consumption :
Vcc = 5.0V C-grade: 45mA (Max.) operating current
I-grade: 50mA (Max.) operating current
1.5uA (Typ.) CMOS standby current
• High speed access time :
-70
70ns (Max.) at Vcc = 5.0V
-55
55ns (Max.) at Vcc = 5.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 2V
• Easy expansion with CE and OE options
• I/O Configuration x8/x16 selectable by LB and UB pin
The BS616LV4015 is a high performance, very low power CMOS Static
Random Access Memory organized as 262,144 words by 16 bits and
operates from a wide range of 4.5V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current
of 1.5uA and maximum access time of 55ns in 5V operation.
Easy memory expansion is provided by an active LOW chip
enable(CE) and active LOW output enable(OE) and three-state output
drivers.
The BS616LV4015 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616LV4015 is available in DICE form, JEDEC standard 44-pin
TSOP Type II package and 48-pin BGA package.
„ PRODUCT FAMILY
PRODUCT
FAMILY
BS616LV4015DC
BS616LV4015EC
BS616LV4015BC
BS616LV4015AC
BS616LV4015DI
BS616LV4015EI
BS616LV4015BI
BS616LV4015AI
OPERATING
TEMPERATURE
Vcc
RANGE
+0 ^O C to +70 ^O C 4.5V ~ 5.5V
-40 ^O C to +85 ^O C 4.5V ~ 5.5V
SPEED
( ns )
Vcc=
5.0V
70/55
70/55
POWER DISSIPATION
STANDBY
( ICCSB1, Max )
Operating
( ICC, Max )
Vcc=
5.0V
Vcc=
5.0V
15uA
45mA
50uA
50mA
PKG TYPE
DICE
TSOP2-44
BGA-48-0810
BGA-48-0608
DICE
TSOP2-44
BGA-48-0810
BGA-48-0608
„ PIN CONFIGURATIONS
A4
1
44
A3
2
43
A2
3
42
A1
4
41
A0
5
40
CE
6
39
DQ0
7
38
DQ1
8
37
DQ2
9
36
DQ3
10
VCC
11
BS616LV4015EC
35
34
GND
DQ4
12
13
BS616LV4015EI
33
32
DQ5
14
31
DQ6
15
30
DQ7
16
29
WE
17
28
A17
18
27
A16
19
26
A15
20
25
A14
21
24
A13
22
23
A5
A6
A7
OE
UB
LB
DQ15
DQ14
DQ13
DQ12
GND
VCC
DQ11
DQ10
DQ9
DQ8
NC
A8
A9
A10
A11
A12
„ BLOCK DIAGRAM
A4
A3
A2
A1
Address
A0
22
2048
A17
Input
Row
A16
Buffer
A15
A14
Decoder
A13
A12
16
DQ0
.
.
Data
Input
16
Buffer
.
.
.
.
16
.
.
Data
Output
16
DQ15
Buffer
Memory Array
2048 x 2048
2048
Column I/O
Write Driver
Sense Amp
128
Column Decoder
CE
WE
OE
UB
LB
Vcc
Gnd
Control
14
Address Input Buffer
A11 A10 A9 A8 A7 A6 A5
Brilliance Semiconductor Inc. reserves the right to modify document contents without notice.
R0201-BS616LV4015
1
Revision 2.4
April 2002