BS616LV2019_06 Datasheet, PDF (1/11 Pages) Brilliance Semiconductor – Very Low Power CMOS SRAM 128K X 16 bit

Very Low Power CMOS SRAM
128K X 16 bit
Pb-Free and Green package materials are compliant to RoHS
BS616LV2019
n FEATURES
Ÿ Wide VCC operation voltage : 2.4V ~ 3.6V
Ÿ Very low power consumption :
VCC = 3.0V Operation current : 25mA (Max.) at 55ns
2mA (Max.) at 1MHz
Standby current : 0.3uA (Typ.) at 25 ^OC
Ÿ High speed access time :
-55
55ns(Max.) at VCC=2.7~3.6V
-70
70ns(Max.) at VCC=2.4~3.6V
Ÿ Automatic power down when chip is deselected
Ÿ Easy expansion with CE and OE options
Ÿ I/O Configuration x8/x16 selectable by LB and UB pin.
Ÿ Three state outputs and TTL compatible
Ÿ Fully static operation
Ÿ Data retention supply voltage as low as 1.5V
n POWER CONSUMPTION
PRODUCT
FAMILY
OPERATING
TEMPERATURE
BS616LV2019DC
BS616LV2019AC
BS616LV2019TC
BS616LV2019AI
BS616LV2019TI
Commercial
+0^OC to +70^OC
Industrial
-40^OC to +85^OC
STANDBY
(ICCSB1, Max)
VCC=3.0V
3.0uA
5.0uA
n DESCRIPTION
The BS616LV2019 is a high performance, very low power CMOS
Static Random Access Memory organized as 131,072 by 16 bits and
operates form a wide range of 2.4V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with typical CMOS standby
current of 0.3uA at 3.0V/25^OC and maximum access time of 55ns at
2.7V/85^OC.
Easy memory expansion is provided by an active LOW chip enable
(CE) and active LOW output enable (OE) and three-state output
drivers.
The BS616LV2019 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The BS616LV2019 is available in DICE form, JEDEC standard
48-pin TSOP Type I package and 48-ball BGA package.
POWER DISSIPATION
1MHz
Operating
(ICC, Max)
VCC=3.0V
10MHz
1.5mA
9mA
2mA
10mA
fMax.
23mA
25mA
PKG TYPE
DICE
BGA-48-0608
TSOP I-48
BGA-48-0608
TSOP I-48
n PIN CONFIGURATIONS
n BLOCK DIAGRAM
A15 1
A14 2
A13 3
A12 4
A11 5
A10 6
A9 7
A8 8
NC 9
NC 10
WE 11
CE2 12
NC 13
UB 14
LB 15
NC 16
NC 17
A7 18
A6 19
A5 20
A4 21
A3 22
A2 23
A1 24
BS616LV2019TC
BS616LV2019TI
1
2
3
4
5
6
A
LB OE A0 A1 A2 NC
B
D8 UB A3 A4 CE D0
C
D9 D10 A5 A6 D1 D2
D VSS D11 NC A7 D3 VCC
E VCC D12 NC A16 D4 VSS
F
D14 D13 A14 A15 D5 D6
G D15 NC A12 A13 WE D7
H
NC A8 A9 A10 A11 NC
48 A16
47 NC
46 GND
45 DQ15
44 DQ7
43 DQ14
42 DQ6
41 DQ13
40 DQ5
39 DQ12
38 DQ4
37 VCC
36 DQ11
35 DQ3
34 DQ10
33 DQ2
32 DQ9
31 DQ1
30 DQ8
29 DQ0
28 OE
27 GND
26 CE
25 A0
A6
A7
A8
A9
A10
A11
A15
A14
A13
A12
DQ0
.
.
.
.
.
.
DQ15
CE2,CE
WE
OE
UB
LB
VCC
VSS
Address
10
Input
Buffer
16
.
.
.
.
16
.
.
Control
Row
Decoder
1024
Memory Array
1024 x 2048
Data
Input
16
Buffer
Data
16
Output
Buffer
2048
Column I/O
Write Driver
Sense Amp
128
Column Decoder
7
Address Input Buffer
A16 A0 A1 A2 A3 A4 A5
48-ball BGA top view
Brilliance Semiconductor, Inc. reserves the right to change products and specifications without notice.
R0201-BS616LV2019
1
Revision 1.3
May.
2006